Hardware Loops

5.4.1.2 Loop Counter Registers (LCn)

The LCn registers are 32-bit read/write registers used to define the number of times each loop is to be executed. LCn always holds a 32-bit signed value. This means that the largest number of loop iterations is 231-1. The DOENn or DOENSHn instructions initialize the LCn register.

5.4.1.3 Status Register (SR) Loop Flag Bits

Certain status bits in the SR are associated with hardware loop initiation and execution. These bits are set and cleared by special loop instructions such as DOENn as well as various loop conditions. Although not recommended, they can also be set and cleared by explicitly writing the SR register. It is not recommended to explicitly change these bits while a loop is active. The bits are:

Loop Flag Bits — Four loop flag bits (LF0, LF1, LF2, LF3) are defined in the SR, one for each hardware loop. The bit is set when the loop is initiated by either the DOENn or the DOENSHn instruction. It is cleared when the loop terminates.

Short Loop Flag Bit — This bit (SLF) is set when the loop is initiated by the DOENSHn instruction. It is cleared when the loop terminates. The short loop can only be used in the inner-most nesting level.

5.4.2 Loop Notation and Encoding

The notation used in the loop definitions is as follows:

Loop Body — The execution sets that are iterated during loop execution.

Long Loop — A loop body that consists of three or more execution sets.

Short Loop — A loop body that consists of one or two execution sets.

Start address (SA) — The address of the first execution set in a loop body. Do not confuse this with SA0, SA1, SA2, and SA3, which are register names used to hold SA values. The start address is defined by the DOSETUPn label instruction and the LOOPSTARTn assembly directive. These two redundant definitions of the start address must be consistent.

Last address (LA) — The address of the last execution set in a loop body. LA is defined by the LOOPENDn assembly directive. In the case of a loop with only one execution set, SA is also the last address.

SA+1 — Address of the execution set following SA (similarly SA+2, and so on).

LA-2— Address of the execution set that comes two execution sets before the execution set at LA (similarly LA-1, and so on).

LPMARKA and LPMARKB — Two marker bits in the prefix words that identify different looping conditions. The LPMARK bits are set automatically by the assembler based on the LOOPSTARTn and LOOPENDn assembly directives, and are not written by the programmer.

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SC140 DSP Core Reference Manual

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Freescale Semiconductor SC140 Loop Notation and Encoding, Loop Counter Registers LCn, Status Register SR Loop Flag Bits