Freescale Semiconductor SC140 specifications NOP Definition, Lpmark Rule L.C.1

NOP Definition

LPMARK Rule L.C.1

A COF instruction cannot have a COF destination that is LPB+1 or LPB+2 of a long loop or LPB+1 of a short loop. This rule does not apply to loop COF instructions (BREAK, CONT, CONTD and SKIPLS) in a nested loop having a COF destination that is LPA-1 or LPA of an enveloping loop.

Example 7-104. COF Destination to Loop Delay Slots

doensh1 #5

...

cmpeq.w #3,d0

jf _dest;not allowed inc d0

inc	d0	{lpmarkb set}
_dest add	d1,d2,d3

Good programming practice never places COF destination labels before or inside a loop delay slot VLES, unless the label is the destination of a loop COF instruction as described above. Programmers should be careful that computed COF destinations are not a loop delay slot. This will ensure that LPMARK rule L.C.1 is enforced.

7.9 NOP Definition

Programmers use NOP as a deterministic way to control word padding within a VLES, and cycle padding in a program. The architecture definition of NOP and its assembler encoding follows:

1.A “baseline VLES” is defined as the source code and binary encoding of the VLES without NOPs in the source code. The baseline VLES has a “baseline size” in words (“W”, a 16-bit unit). It may or may not include prefixes, reordered encoding, or modulo alignment padding. The “baseline encoding” may pad a word for modulo alignment, but it should not be called a NOP in the Tools document or the CRM. In this discussion, an assembler-generated NOP encoding not present in the source code will be called a “PAD”.

2.A “NOP” is defined in the CRM Appendix A as a source syntax having a 1W prefix encoding that can be used in a standalone NOP-only VLES or embedded in a baseline VLES having a prefix. The binary encoding of the standalone NOP is a 1W prefix having the VLES size in the aaa field, and the embedded NOP is a 1W prefix having aaa=0, as specified in the CRM Appendix. A. The NOP definition is to increase the baseline size by 1 word for each source NOP added to the baseline VLES. This means that NOPs are not compressed or absorbed into baseline VLES encodings already having prefixes. They are concatenated as higher addressed words with the baseline VLES encoding occupying the lower addresses.

3.Prefix grouped VLES already have a prefix, and each NOP adds one 1W embedded NOP prefix having aaa=0 to the baseline VLES encoding. Serially (non-prefixed) grouped VLES are encoded without a prefix, so the first NOP is added differently. The first NOP encodes as a standalone 1W prefix having the VLES size in the aaa field, and corrects the serial grouping field of the baseline instructions. Any additional NOPs are encoded as in prefix grouping.

4.When NOPs are used in a standalone VLES, the baseline size is zero. A VLES containing only N NOPs in the source code has a size of N words. It is implemented by a standalone 1W NOP prefix having the VLES size in the aaa field followed by N-1 embedded 1W NOP prefixes having aaa=0. This is the only guaranteed way to pad N consecutive words.

7-60 SC140 DSP Core Reference Manual