Freescale Semiconductor SC140 specifications Fractional Move Instructions

Address Generation Unit

.

MOVE.F (fractional move)

MOVE.2F (fractional double move)

MOVE.4F (fractional quad-move)

39	32	16	0
	sign		zero-fill
extension
39	32	16	0
	sign		zero-fill
extension
	sign		zero-fill
extension
39	32	16	0
	sign		zero-fill
extension
	sign		zero-fill
extension
	sign		zero-fill
extension
	sign		zero-fill
extension

Figure 2-17. Fractional Move Instructions

The four instructions MOVES.F, MOVES.2F, MOVES.4F, and MOVES.L move data from data registers to the memory with scaling and limiting. The first three operate on 16-bit data. The MOVES.L instruction performs 32-bit scaling and limiting before the move.

For all moves on the SC140, the syntax requires that the source of the data be specified first followed by the destination (SRC, DST). The source and destination are separated by a comma with no spaces either before or after the comma.

Multi-register move instructions originate or update several registers. Registers that are accessed as part of the same move instruction are specified with a colon separator. For example, a MOVE.4F from a memory location pointed by R0 to the registers D0, D1, D2, and D3 is written as:

MOVE.4F (R0),D0:D1:D2:D3

In this case, let the address in R0 be noted as A0. The fractional word in location A0 then goes to D0, the word in A0 + 2 goes to D1, the word in A0 + 4 goes to D2, and the word in A0 + 6 goes to D3. The addresses increment by two since the addressing unit is always a byte. Moves to or from more than one register are treated according to the same principle.

A special MOVE.L instruction supports moving data to and from data register extensions (Dn.e). In order to support full saving and restoring of the machine state, extension moves also include the limit bit Ln of the register, and are therefore nine bits wide. In one case of the MOVE.L instruction, two extensions belonging to two consecutive data registers are moved concurrently from the registers to the memory as part of a 32-bit access.

2-54 SC140 DSP Core Reference Manual