Freescale Semiconductor SC140 Comparator Condition Selection, Access Type Selection The ATS bit

Event Detection Unit (EDU) Channels and Registers

Table 4-20. EDCD_CTRL Description (Continued)

Name	Description	Settings
EDCDEN	EDCD Enable — Used to enable or	0000	= EDCD is disabled.
Bits 6–3	disable the EDCD. When enabled,	0001	= EDCD is disabled, but is enabled when an event is
	EDCD continues to operate until it is	detected by EDCA0.
	explicitly disabled by writing 0000 into	0010	= EDCD is disabled, but is enabled when an event is
	EDCDEN bits, or when EDCDEN bits	detected by EDCA1.
	are changed for another enabling	0011	= EDCD is disabled, but is enabled when an event is
	condition. The channel remains disabled	detected by EDCA2.
	until a new enabling condition occurs.	0100	= EDCD is disabled, but is enabled when an event is
		detected by EDCA3.
	When the EDCDEN bits are set to	0101	= EDCD is disabled, but is enabled when an event is
	enable the operation of the EDCD upon	detected by EDCA4.
	event occurrence, the EOnCE	0110	= EDCD is disabled, but is enabled when an event is
	overwrites these bits to 1111 one clock	detected by EDCA5.
	cycle after the appearance of the event.	0111	= EDCD is disabled, but is enabled when an event is
	The latency for enabling the channel is	detected by the optional external EDCA6.
	one cycle.	1000	= EDCD is disabled, but is enabled when an event is
		detected by the optional external EDCA7.
		1001	= EDCD is disabled, but is enabled when a count event
		is detected.
		1010	= EDCD is disabled, but is enabled when EED is
		asserted and EED is programmed as input in the
		EE_CTRL register.
		1011	= EDCD is enabled but will be disabled when EED is
		negated, in both cases EED is programmed as an input
		in the EE_CTRL register. This state can only be reached
		by previously being in the 1010 state and asserting the
		EED pin.
		1100	= Reserved
		1101	= Reserved
		1110	= Reserved
		1111	= EDCD is enabled.
CCS	Comparator Condition Selection —	00 = Equal to EDCD_REF
Bits 2–1	These bits select one of these four	01 = Not equal to EDCD_REF
	results from the comparator:	10 = Greater than EDCD_REF
	• Equal to	11 = Less than EDCD_REF
	• Not equal to	In case of multi-operand data accesses (such as MOVE.2W
	• Greater than
		etc.) the compare result will be true if the condition is fulfilled
	• Less than
		for any of the individual operands (one byte, word etc.).
		However for the “not equal” condition – all operands must
		be not equal in order for the condition to be fulfilled.
ATS	Access Type Selection — The ATS bit	0 = Read
Bit 0	determines whether the memory access	1 = Write
	is read or write.

4-60 SC140 DSP Core Reference Manual