2-10 SC140 DSP Core Reference Manual
DALU
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2.2.1.2 Multiply-Accumulate (MAC) Unit
The MAC unit is the arithmetic part of the ALU containing both a multipli er and an adder. It also performs
other operations such as ro unding, saturation, comparisons, and shifting. Inputs to the MAC unit are from
data registers or from immediate data programmed into the instruction. As many as three operands may be
inputs. The destination for MAC instructions is always a data register in the 40-bit form EXT:HP:LP. The
multiplier executes 16 by 16 parallel multiplication of two’s complement data, signed or unsigned,
fractional or integer. The multiplier output can be accumulated with 40-bit data in a destination register. A
detailed description of each multiplication operation is given in Section 2.2.2.3, “Multiplication.” The
adder executes addition and subtraction of two 40-bit operands. All MAC instructions are executed in one
clock cycle.
Table 2-5 lists the arithmetic instructions that are executed in the MAC unit. A more detailed description of
each instruction is given in Appendix A, “SC140 DSP Core Instruction Set.”
Table 2-4. Data Registers Access Width
Operand Type Data Width (Bits)
Byte 8
Word 16
Long 32
Two word 32
Four byte 32
Two long word 64
Four word 64
Table 2-5. DALU Arithmetic Instructions (MAC)
Instruction Description
ABS Absolute value
ADC Add long with carry
ADD Add
ADD2 Add two words
ADDNC.W Add without changing the carry bit in the SR
ADR Add and round
ASL Arithmetic shift left by one bit
ASR Arithmetic shift right by one bit
CLR Clear
CMPEQ Compare for equal
CMPGT Compare for greater than
CMPHI Compare for higher (unsigned)