Memory Interface

Table 2-28 shows the representation of the stack support instructions in big and little endian modes. In the examples shown in this table, it is assumed that the stack access is to address A0. The stack instructions treat the register data like a 32-bit long word move.

Table 2-28. Stack Support Instructions in Big and Little Endian Modes

Instruction

Register Operands

Big Endian

Little

Endian

 

 

 

Single

Example: PUSH D0

 

 

 

 

 

 

 

A0 = A

A0 = D

POP

 

31

 

 

 

 

 

 

0

A1 = B

A1 = C

POPN

 

 

 

 

 

 

 

A2 = C

A2 = B

 

 

 

 

 

 

 

 

 

 

 

PUSH

D0 =

 

A

 

B

 

 

C

D

 

 

A3 = D

A3 = A

PUSHN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Double

Example: PUSH D0 PUSH D1

 

 

 

 

A0 = A

A0 = D

POP

 

31

 

 

 

 

 

 

0

A1 = B

A1 = C

POPN

 

 

 

 

 

 

 

A2 = C

A2 = B

D0 =

 

 

 

 

 

 

 

 

 

 

PUSH

 

A

 

B

 

C

D

 

 

A3 = D

A3 = A

PUSHN

D1 =

 

 

 

 

 

 

 

 

 

 

A4 = E

A4 = H

 

 

 

F

 

G

H

 

 

 

 

E

 

 

 

 

A5 = F

A5 = G

 

 

 

 

 

 

 

 

 

 

 

 

A6 = G

A6 = F

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A7 = H

A7 = E

Table 2-29 shows the representation of the bit mask instructions in big and little endian modes.

Table 2-29. Bit Mask Instructions in Big and Little Endian Modes

Instruction

Register Operands

Big Endian

Little

Endian

 

 

 

BMCHG.W

Example: BMSET.W #$1234, (A0)

A0 = A

A0 = B

BMCLR.W

15

 

0

 

A1 = B

A1 = A

BMSET.W

 

 

 

 

Data =

 

 

 

 

 

 

BMTSTS.W

 

A

B

 

 

 

BMTSTC.W

 

 

 

 

 

 

 

Mask =

12

34

 

 

 

BMTSET.W

 

 

 

NOT.W

 

 

 

 

 

 

 

AND.W

 

 

 

 

 

 

 

OR.W

 

 

 

 

 

 

 

EOR.W

 

 

 

 

 

 

 

SC140 DSP Core Reference Manual

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Page 99
Image 99
Freescale Semiconductor SC140 specifications Example Push D0 Push D1, Example BMSET.W #$1234, A0, Data =, Mask =