Freescale Semiconductor SC140 specifications Modulo Addressing Example

Address Generation Unit

register Rn has one Mj register assigned to it by encoding in the MCTL. The lower boundary value of the buffer resides in the Bn register, and the upper boundary is calculated as Bn+Mj-1. Mj must be smaller than 231 - 1 (Mj < 231 - 1).

The modulo addressing definition, using a base register (Bn) and a modulo register (Mj), enables the programmer to locate the modulo buffer at any address. The buffer start address is only required to be aligned to the access width.

The address pointer Rn is not required to start at the lower address boundary, nor to end on the upper address boundary. Rn can initially point anywhere (aligned to its access width) within the defined modulo address range, Bn ≤ Rn < B+Mj. Assuming the (Rn)+ indirect addressing mode, if the address register pointer increments past the upper boundary of the buffer (base address + Mj-1), it wraps around through the base address (lower boundary). Alternatively, assuming the (Rn)- indirect addressing mode, if the address decrements past the lower boundary (base address), it wraps around through the base address + Mj-1 (upper boundary).

The following constraints apply:

1.For proper modulo addressing, if an offset Ni is used in the address calculation, the 32-bit absolute effective value Ni must be less than or equal to Mj, where “effective” means the programmed Ni is multiplied by the access width. For example, move.w (r0)+n0,d0 translates to the restriction 2*n0 ≤ Μj, and move.l (r0)+,d0 translates to 4 ≤ Mj. If effective Ni > Mj, the result of the address calculation is undefined. Multiple wrap-around modulo addressing supports the situation of effective Ni greater than Mj.

2.Mj must be aligned to the access width used. For example, if the buffer is used with a MOVE.2L instruction, Mj must be aligned to 8 (be a multiple of 8). If the modulus is less than the access width, the data accessed as well as the address calculations are undefined.

3.When Bn is used as a base address register, the use of Rn+8 as a pointer is illegal since this is the same physical register.

Modulo addressing is illustrated in Figure 2-15. Addresses will be kept within the eleven addresses shown. For the instruction, move.w (r0+$000e),d0, the access will be made from $26 (38), if the base address is $20, the modulus is $c, and r0 is $24. The operation is 36+14=50=38 in modulus 12, base address 32 (50–44 + 32 = 38).

32

36

38

$0020 = B

M = 12

44

$002c = B + M – 1

Figure 2-15. Modulo Addressing Example

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