Core Architecture Features

1.3.1 Typical System-On-Chip Configuration

The SC140 is a high-performance general-purpose fixed-point DSP core, allowing it to support many system-on-chip (SoC) configurations. A library of modules containing memories, peripherals, accelerators, and other processor cores makes it possible for a variety of highly integrated and cost-effective SoC devices to be built around the SC140. Figure 1-1 shows a block diagram of a typical SoC chip made up of the SC140 core and associated SoC components (described below). In a typical system the SC140 core is enveloped in a platform that includes the core and supporting zero wait-state memories. This platform is integrated as a unit in the SoC. Although not indicated in this configuration, an SoC can contain more than one SC140 core platform.

An on-platform instruction set accelerator plug-in can be used as part of the SC140 core platform to provide additional instructions for unique application solutions such as video processing, which require specific arithmetic instructions in addition to the main instruction set.

SC140 DSP core platform — Includes the DSP core and the immediate supporting blocks that typically run at the full core frequency. The DSP platform typically includes:

SC140 DSP core

Instruction Set Accelerator Plug-in (ISAP) - for expanding the instruction set with application-specific instructions.

L1 caches - data and instruction caches, operating with zero wait states in case of cache hit

Unified M1 memory - supporting both program and data, and hence connected to both the program and data buses of the core. The M1 memory operates with no wait states. It could be either RAM or ROM, or a mix of both. The RAM, depending on its’ size, may be connected as a slave to an external DMA.

Program interrupt controller (PIC)

Interfaces - translate the core data and program fetch requests to the bus protocol supported by the system, usually in reduced frequency.

DSP Expansion Area — This area includes the functional units that interface between the core and the DSP application, most importantly the functions that send and receive data from external input/output sources, under the control of the software running on the DSP core. In addition, this area includes accelerators that execute portions of the application, in order to boost performance and decrease power consumption. This area is application-specific and may or may not include various functional units such as:

Synchronous serial interface

Serial communication interface

Viterbi accelerator

Filter coprocessors

System Expansion Area — This area includes the SoC functional units that are not tightly coupled with the DSP core. Typically it may include other processors with their support platform as well. This area is application-specific, and may include various functional units such as:

External memory interface

Direct memory access (DMA) controller

L2 Cache controller for either data or program

Chip-level Interrupt control unit

On-chip Level 2 (M2) memory expansion modules

Other processor cores with their supporting platforms

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SC140 DSP Core Reference Manual

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Freescale Semiconductor SC140 specifications Typical System-On-Chip Configuration