LPMARKx

LPMARKB

For long loops (SLF=0), this prefix bit is placed at LA-2 (two sets before the last set of the loop). It instructs the active loop to decrement LCn and issue a jump delayed operation (with 2 delay slots) to SAn, if LCn is greater than one. If LCn is less than or equal to one, then the LCn register and the LFn bit are cleared. For short loops (SLF=1) of two execution sets, this prefix bit is placed at the first set of the loop (SA).

LPMARKA

For long loops (SLF=0), this prefix bit is placed at LA (the last set of the loop) and is used in special cases. It instructs the active loop machine to decrement LCn and jump to SAn if LCn is greater than one. If LCn is less than or equal to one, then the LCn register and the LFn bit are cleared. This prefix bit is used only in cases where there is a possibility that the loop machine might not be able to identify LPMARKB, which is normally used in long loops. An example is the case of nested loops where the inner loop may be skipped with SKIPLS directly to the LA of the enveloping loop. In case of short loops (SLF=1) of one execution set, LPMARKA is always placed at the first set of the loop (SA).

Table A-17. Combinations of LPMARKx Use

LPMARKA

LPMARKB

LFn

SLF

LCn

Description

 

 

 

 

 

 

 

 

 

 

 

 

no

LPMARKB

set

clear

> 1

LCn decrements by one and a jump with two delay slots

 

 

 

 

 

to SAn occurs. LPMARKs appearing in the delay slots

 

 

 

 

 

are ignored.

 

 

 

 

 

 

 

 

 

 

1

LCn and LFn are cleared. The active loop is terminated.

 

 

 

 

 

Every LPMARKA that appears in the next two delay slots

 

 

 

 

 

is ignored.

 

 

 

 

 

 

LPMARKA

no

set

clear

> 1

LCn decrements by one and a jump to SAn occurs.

 

 

 

 

 

 

 

 

 

 

1

LCn, LFn, and SLF are cleared. The active loop is termi-

 

 

 

 

 

nated.

 

 

 

 

 

 

no

LPMARKB

set

set

> 1

LCn decrements by one and LPMARKs appearing in the

 

 

 

 

 

next execution set are ignored. A jump with one delay

 

 

 

 

 

slot to SAn occurs.

 

 

 

 

 

 

 

 

 

 

1

LCn, LFn, and SLF are cleared. The active loop is termi-

 

 

 

 

 

nated. LPMARKs appearing in the next execution set are

 

 

 

 

 

treated.

 

 

 

 

 

 

LPMARKA

no

set

set

> 1

LCn decrements by one and a jump to SAn occurs.

 

 

 

 

 

 

 

 

 

 

1

LCn, LFn, and SLF are cleared. The active loop is termi-

 

 

 

 

 

nated.

 

 

 

 

 

 

LPMARKA

LPMARKB

set

clear

> 1

If LPMARKA and LPMARKB appear together,

 

 

 

 

 

LPMARKA belongs to the inner loop and LPMARKB

LPMARKA

LPMARKB

set

set

> 1

belongs to the outer loop.

 

 

 

 

 

If the inner LCn > 1, the LPMARKB is ignored and the

 

 

 

 

 

LPMARKA is executed.

 

 

 

 

 

If the inner LCn 1, the inner LCn and the inner LFn are

 

 

 

 

 

cleared. The active inner loop is terminated and the

 

 

 

 

 

LPMARKB is executed.

 

 

 

 

 

 

Status and Conditions that Affect LPMARK Execution

The loop flag (LFn), short loop flag (SLFn), and loop counters (LCn) affect the response as described in the description above.

A-222

SC140 DSP Core Reference Manual

Page 536
Image 536
Freescale Semiconductor SC140 Status and Conditions that Affect Lpmark Execution, Table A-17. Combinations of LPMARKx Use