STANDARD AND PTS INTERRUPTS

PTSSEL

Address:

0004H

 

Reset State:

0000H

The PTS select (PTSSEL) register selects either a PTS microcode routine or a standard interrupt service routine for each interrupt request. Setting a bit selects a PTS microcode routine; clearing a bit selects a standard interrupt service routine. When PTSCOUNT reaches zero, hardware clears the corresponding PTSSEL bit. The PTSSEL bit must be set manually to re-enable the PTS channel.

15

—

EXTINT3

EXTINT2

OVR2_3

7

 

 

 

 

 

 

 

EPA0

RI

TI

EXTINT1

 

 

 

 

8

OVR0_1

EPA3

EPA2

EPA1

 

 

 

 

0

EXTINT0

—

OVRTM2

OVRTM1

 

 

 

 

Bit

 

Function

 

Number

 

 

 

 

 

 

 

15, 2

Reserved; for compatibility with future devices, write zero to this bit.

 

 

14:3

Setting a bit causes the corresponding interrupt to be handled by a PTS microcode

1:0

routine.

 

 

 

The PTS interrupt vector locations are as follows:

 

 

Bit Mnemonic

Interrupt

PTS Vector

 

EXTINT3

EXTINT3 pin

FF205CH

 

EXTINT2

EXTINT2 pin

FF205AH

 

OVR2_3†

EPA Capture Channel 2 or 3 Overrun

FF2058H

 

OVR0_1†

EPA Capture Channel 0 or 1 Overrun

FF2056H

 

EPA3

EPA Capture/Compare Channel 3

FF2054H

 

EPA2

EPA Capture/Compare Channel 2

FF2052H

 

EPA1

EPA Capture/Compare Channel 1

FF2050H

 

EPA0

EPA Capture/Compare Channel 0

FF204EH

 

RI

SIO Receive

FF204CH

 

TI

SIO Transmit

FF204AH

 

EXTINT1

EXTINT1 pin

FF2048H

 

EXTINT0

EXTINT0 pin

FF2046H

 

OVRTM2

Timer 2 Overflow/ Underflow

FF2042H

 

OVRTM1

Timer 1 Overflow/ Underflow

FF2040H

†PTS service is not recommended because the PTS cannot determine the source of shared interrupts.

Figure 6-4. PTS Select (PTSSEL) Register

6.5.1Programming Considerations for Multiplexed Interrupts

An overrun on the EPA capture compare channels can generate the multiplexed capture overrun interrupts (OVR0_1 and OVR2_3). Write to the EPA_MASK (Figure 10-11 on page 10-22) reg- ister to enable or disable the multiplexed interrupt sources and the INT_MASK1 register to en- able or disable the OVR0_1 and OVR2_3 interrupts.

PTS service is not recommended for multiplexed interrupts because it cannot determine the inter- rupt source.

6-11

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Intel 8XC196NP, 80C196NU Programming Considerations for Multiplexed Interrupts, Ptssel, Bit Mnemonic Interrupt PTS Vector
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Microcontroller, 80C196NU, 8XC196NP specifications

The Intel 8XC196NP and 80C196NU microcontrollers are part of Intel's renowned 16-bit microcontroller series that gained popularity in the 1980s and 1990s for embedded systems applications. Designed for a variety of applications, these microcontrollers are characterized by their robust performance, versatility, and industry-standard architecture.

The 8XC196NP features an enhanced instruction set with over 100 instructions, allowing for efficient code execution. It operates at clock speeds up to 16 MHz, which contributes to improved performance in time-sensitive applications. The microcontroller is equipped with a 16-bit data bus, enabling more efficient data handling compared to its 8-bit predecessors, thus accommodating complex algorithms and large data sets.

In terms of memory architecture, the 8XC196NP supports an addressable memory space of up to 64 KB of program memory and 64 KB of data memory. This configuration provides sufficient space for large applications while ensuring fast data access. The microcontroller includes integrated features such as timers, serial I/O capabilities, and interrupt processing, which enhance its functionality for real-time applications and control mechanisms.

The 80C196NU, on the other hand, is designed for lower power operation, making it suitable for battery-powered devices. This microcontroller maintains similar features to the 8XC196NP while offering advancements that support low-power consumption. The 80C196NU can also function in a range of temperature environments, making it adaptable for industrial applications.

Both the 8XC196NP and 80C196NU support external memory interfacing, allowing designers to expand the system's capability by connecting additional ROM and RAM. This flexibility makes them appealing for developing complex systems, such as motor controls, industrial automation, and consumer electronics.

Another standout feature of these microcontrollers is their built-in debugging capabilities. Intel provided hardware and software tools that enabled developers to test and troubleshoot their applications effectively, reducing the development time and increasing reliability.

Overall, the Intel 8XC196NP and 80C196NU microcontrollers stand out for their dependability, versatility, and performance, contributing significantly to the evolution of embedded system design. Their legacy continues to influence modern microcontroller technology, ensuring their relevance in a wide array of applications today.
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