Intel 8XC196NP, 80C196NU Overview of the Instruction SET, Operand Type Definitions, Restrictions

CHAPTER 4

PROGRAMMING CONSIDERATIONS

This section provides an overview of the instruction set of the MCS® 96 microcontrollers and of- fers guidelines for program development. For detailed information about specific instructions, see Appendix A.

4.1OVERVIEW OF THE INSTRUCTION SET

The instruction set supports a variety of operand types likely to be useful in control applications (see Table 4-1).

NOTE

The operand-type variables are shown in all capitals to avoid confusion. For example, a BYTE is an unsigned 8-bit variable in an instruction, while a byte is any 8-bit unit of data (either signed or unsigned).

Table 4-1. Operand Type Definitions

Operand Type	No. of	Signed	Possible Values	Addressing
	Bits			Restrictions
BIT	1	No	True (1) or False (0)	As components of bytes
BYTE	8	No	0 through 28–1 (0 through 255)	None
SHORT-INTEGER	8	Yes	–27through +27–1	None
			(–128 through +127)
WORD	16	No	0 through 216–1	Even byte address
			(0 through 65,535)
INTEGER	16	Yes	–215through +215–1	Even byte address
			(–32,768 through +32,767)
DOUBLE-WORD	32	No	0 through 232–1	An address in the lower
(Note 1)			(0 through 4,294,967,295)	register file that is evenly
				divisible by four (Note 2)
LONG-INTEGER	32	Yes	–231through +231–1	An address in the lower
(Note 1)			(–2,147,483,648 through	register file that is evenly
			+2,147,483,647)	divisible by four (Note 2)
QUAD-WORD	64	No	0 through 264–1	An address in the lower
(Note 3)				register file that is evenly
				divisible by eight

NOTES:

1.The 32-bit variables are supported only as the operand in shift operations, as the dividend in 32-by- 16 divide operations, and as the product of 16-by-16 multiply operations.

2.For consistency with third-party software, you should adopt the C programming conventions for addressing 32-bit operands. For more information, refer to page 4-11.

3.QUAD-WORD variables are supported only as the operand for the EBMOVI instruction.

4-1