Intel 8XC196NP, 80C196NU Action Taken when a Valid Edge Occurs, EPA Overruns, EPAxCON.0, EPAxTIME

		EVENT PROCESSOR ARRAY (EPA)
	Table 10-4. Action Taken when a Valid Edge Occurs
Overwrite Bit	Status of	Action taken when a valid edge occurs
	Capture Buffer
(EPAx_CON.0)
	& EPAx_TIME
0	empty	Edge is captured and event time is loaded into the capture buffer and
		EPAx_TIME register.
0	full	New data is ignored — no capture, EPA interrupt, or transfer occurs;
		OVRx interrupt pending bit is set.
1	empty	Edge is captured and event time is loaded into the capture buffer and
		EPAx_TIME register.
1	full	Old data is overwritten in the capture buffer; OVRx interrupt pending
		bit is set.

An input capture event does not set the interrupt pending bit until the captured time value actually moves from the capture buffer into the EPAx_TIME register. If the buffer contains data and the PTS is used to service the interrupts, then two PTS interrupts occur almost back-to-back (that is, with one instruction executed between the interrupts).

10.4.1.1EPA Overruns

Overruns occur when an EPA input transitions at a rate that cannot be handled by the EPA inter- rupt service routine. If no overrun handling strategy is in place, and if the following three condi- tions exist, a situation may occur where both the capture buffer and the EPAx_TIME register contain data, and no EPA interrupt is generated.

•an input signal with a frequency high enough to cause overruns is present on an enabled EPA pin, and

•the overwrite bit is set (EPAx_CON.0 = 1; old data is overwritten on overrun), and

•the EPAx_TIME register is read at the exact instant that the EPA recognizes the captured edge as valid.

The input frequency at which this occurs depends on the length of the interrupt service routine as well as other factors. Unless the interrupt service routine includes a check for overruns, this situ- ation will remain the same until the device is reset or the EPAx_TIME register is read. The act of reading EPAx_TIME allows the buffered time value to be moved into EPAx_TIME. This clears the buffer and allows another event to be captured. Remember that the act of the transferring the buffer contents to the EPAx_TIME register is what actually sets the EPAx interrupt pending bit and generates the interrupt.

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