INSTRUCTION SET REFERENCE

 

 

 

 

Table A-6. Instruction Set (Continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

Mnemonic

 

 

 

 

Operation

 

 

 

 

Instruction Format

 

 

 

 

 

MUL

MULTIPLY INTEGERS. Multiplies the source

 

DEST, SRC

(2 operands)

and destination integer operands, using

MUL

lreg, waop

 

signed arithmetic, and stores the 32-bit result

 

(11111110) (011011aa) (waop) (lreg)

 

into the destination long-integeroperand.

 

 

 

 

The sticky bit flag is undefined after the

 

 

 

instruction is executed.

 

 

 

 

 

 

 

 

(DEST) ← (DEST) × (SRC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PSW Flag Settings

 

 

 

 

 

 

Z

 

N

 

C

V

 

VT

ST

 

 

 

 

 

—

—

— —

—

 

?

 

 

 

 

 

 

 

 

MUL

MULTIPLY INTEGERS. Multiplies the two

 

DEST, SRC1, SRC2

(3 operands)

source integer operands, using signed

MUL

lreg, wreg, waop

 

arithmetic, and stores the 32-bit result into

 

(11111110) (010011aa) (waop) (wreg) (lreg)

 

the destination long-integeroperand. The

 

 

 

 

sticky bit flag is undefined after the instruction

 

 

 

is executed.

 

 

 

 

 

 

 

 

NOTE: (8XC196NU only.) A destination

 

(DEST) ← (SRC1) × (SRC2)

 

 

 

 

 

 

 

 

address in the range 00H–0FH

 

 

 

 

 

 

 

 

 

 

 

 

 

enables the multiply-accumulate

 

 

 

 

PSW Flag Settings

 

 

 

function. When set, bit 3 of the

 

 

 

 

 

 

 

 

 

 

 

 

 

destination address causes the

 

 

Z

 

N

 

C

V

 

VT

ST

 

 

 

 

 

 

 

 

 

accumulator to be cleared before

 

 

—

 

—

—

—

—

 

?

 

 

 

 

 

 

 

 

 

 

the results of the multiply are

 

 

 

 

 

 

 

 

 

 

 

 

 

added to the contents of the accu-

 

 

 

 

 

 

 

 

 

 

 

 

 

mulator. For example, if the desti-

 

 

 

 

 

 

 

 

 

 

 

 

 

nation address is 08H, the

 

 

 

 

 

 

 

 

 

 

 

 

 

accumulator is cleared and then

 

 

 

 

 

 

 

 

 

 

 

 

 

the results of the multiply are

 

 

 

 

 

 

 

 

 

 

 

 

 

added. However, if the destination

 

 

 

 

 

 

 

 

 

 

 

 

 

address is 00H, the results of the

 

 

 

 

 

 

 

 

 

 

 

 

 

multiply are added to the current

 

 

 

 

 

 

 

 

 

 

 

 

 

contents of the accumulator.

 

 

 

 

MULB

MULTIPLY SHORT-INTEGERS. Multiplies

 

DEST, SRC

(2 operands)

the source and destination short-integer

MULB

wreg, baop

 

operands, using signed arithmetic, and stores

 

(11111110) (011111aa) (baop) (wreg)

 

the 16-bit result into the destination integer

 

 

 

 

operand. The sticky bit flag is undefined after

 

 

 

the instruction is executed.

 

 

 

 

 

 

(DEST) ← (DEST) × (SRC)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PSW Flag Settings

 

 

 

 

 

 

Z

 

N

 

C

V

 

VT

ST

 

 

 

 

 

—

 

—

—

—

—

 

?

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A-29

Page 333 Page 335
Page 334
Image 334
Intel 8XC196NP, 80C196NU, Microcontroller manual Mulb
Page 333 Page 335

Microcontroller, 80C196NU, 8XC196NP specifications

The Intel 8XC196NP and 80C196NU microcontrollers are part of Intel's renowned 16-bit microcontroller series that gained popularity in the 1980s and 1990s for embedded systems applications. Designed for a variety of applications, these microcontrollers are characterized by their robust performance, versatility, and industry-standard architecture.

The 8XC196NP features an enhanced instruction set with over 100 instructions, allowing for efficient code execution. It operates at clock speeds up to 16 MHz, which contributes to improved performance in time-sensitive applications. The microcontroller is equipped with a 16-bit data bus, enabling more efficient data handling compared to its 8-bit predecessors, thus accommodating complex algorithms and large data sets.

In terms of memory architecture, the 8XC196NP supports an addressable memory space of up to 64 KB of program memory and 64 KB of data memory. This configuration provides sufficient space for large applications while ensuring fast data access. The microcontroller includes integrated features such as timers, serial I/O capabilities, and interrupt processing, which enhance its functionality for real-time applications and control mechanisms.

The 80C196NU, on the other hand, is designed for lower power operation, making it suitable for battery-powered devices. This microcontroller maintains similar features to the 8XC196NP while offering advancements that support low-power consumption. The 80C196NU can also function in a range of temperature environments, making it adaptable for industrial applications.

Both the 8XC196NP and 80C196NU support external memory interfacing, allowing designers to expand the system's capability by connecting additional ROM and RAM. This flexibility makes them appealing for developing complex systems, such as motor controls, industrial automation, and consumer electronics.

Another standout feature of these microcontrollers is their built-in debugging capabilities. Intel provided hardware and software tools that enabled developers to test and troubleshoot their applications effectively, reducing the development time and increasing reliability.

Overall, the Intel 8XC196NP and 80C196NU microcontrollers stand out for their dependability, versatility, and performance, contributing significantly to the evolution of embedded system design. Their legacy continues to influence modern microcontroller technology, ensuring their relevance in a wide array of applications today.
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