Intel 8XC196NP, 80C196NU manual Clock Prescaler, Disabled, PWM xCONTROL Address, PWM Duty Cycle

8XC196NP, 80C196NU USER’S MANUAL

		Clock Prescaler	÷2 Clock Prescaler	÷4 Clock Prescaler †
		Disabled	Enabled	Enabled
		PWM x_CON × 2	PWM x_CON × 4	PWM x_CON × 8
Pulsewidth (in µs)	=	-----------------------f-----------------------	----------------------------------------------	----------------------------------------------
			f	f
Duty Cycle (in %)	=	Pulsewidth--------------------------------× 100
		TPW M
where:
PWMx_CON	=	8-bit value to load into the PWMx_CONTROL register
Pulsewidth	=	width of each high pulse
f	=	operating frequency, in MHz
TPWM	=	output period on the PWM pin, in μs

†80C196NU only.

PWMx_CONTROL	Address:	Table 9-2
x = 0–2	Reset State:	00H

The PWM control (PWMx_CONTROL) register determines the duty cycle of the PWM x channel. A zero loaded into this register causes the PWM to output a low continuously (0% duty cycle). An FFH in this register causes the PWM to have its maximum duty cycle (99.6% duty cycle).

7	0
	PWM Duty Cycle
Bit	Function
Number
7:0	PWM Duty Cycle

This register controls the PWM duty cycle. A zero loaded into this register causes the PWM to output a low continuously (0% duty cycle). An FFH in this register causes the PWM to have its maximum duty cycle (99.6% duty cycle).

Figure 9-5. PWM Control (PWMx_CONTROL) Register

9-8