8XC196NP, 80C196NU USER’S MANUAL

10.4.1.2Preventing EPA Overruns

Any one of the following methods can be used to prevent or recover from an EPA overrun situa- tion.

Clear EPAx_CON.0

When the overwrite bit (EPAx_CON.0) is zero, the EPA does not consider the captured edge until the EPAx_TIME register is read and the data in the capture buffer is transferred to EPAx_TIME. This prevents the situation by ignoring new input capture events when both the capture buffer and EPAx_TIME contain valid capture times. The OVRx pending bit in EPA_PEND is set to indicate that an overrun occurred.

Enable the OVRx interrupt and read the EPAx_TIME register within the ISR

If this situation occurs, the overrun (OVRx) interrupt will be generated. The OVRx interrupt will then be acknowledged and its interrupt service routine will read the EPAx_TIME regis- ter. After the CPU reads the EPAx_TIME register, the buffered data moves from the buffer to the EPAx_TIME register. This sets the EPA interrupt pending bit.

10.4.2 Operating in Compare Mode

When the selected timer value matches the event-time value, the action specified in the control register occurs (i.e., the pin is set, cleared, or toggled). If the re-enable bit (EPAx_CON.3) is set, the action reoccurs on every timer match. If the re-enable bit is cleared, the action does not reoc- cur until a new value is written to the event-time register. See “Programming the Capture/Com- pare Channels” on page 10-18 for configuration information.

In compare mode, you can use the EPA to produce a pulse-width modulated (PWM) output. The following sections describe four possible methods.

10.4.2.1Generating a Low-speed PWM Output

You can generate a low-speed, pulse-width modulated output with a single EPA channel and a standard interrupt service routine. Configure the EPA channel as follows: compare mode, toggle output, and the compare function re-enabled. Select standard interrupt service, enable the EPA interrupt, and globally enable interrupts with the EI instruction. When the assigned timer/counter value matches the value in the event-time register, the EPA toggles the output pin and generates an interrupt. The interrupt service routine loads a new value into EPAx_TIME.

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Intel Microcontroller, 80C196NU manual Operating in Compare Mode, Preventing EPA Overruns, Generating a Low-speed PWM Output

Microcontroller, 80C196NU, 8XC196NP specifications

The Intel 8XC196NP and 80C196NU microcontrollers are part of Intel's renowned 16-bit microcontroller series that gained popularity in the 1980s and 1990s for embedded systems applications. Designed for a variety of applications, these microcontrollers are characterized by their robust performance, versatility, and industry-standard architecture.

The 8XC196NP features an enhanced instruction set with over 100 instructions, allowing for efficient code execution. It operates at clock speeds up to 16 MHz, which contributes to improved performance in time-sensitive applications. The microcontroller is equipped with a 16-bit data bus, enabling more efficient data handling compared to its 8-bit predecessors, thus accommodating complex algorithms and large data sets.

In terms of memory architecture, the 8XC196NP supports an addressable memory space of up to 64 KB of program memory and 64 KB of data memory. This configuration provides sufficient space for large applications while ensuring fast data access. The microcontroller includes integrated features such as timers, serial I/O capabilities, and interrupt processing, which enhance its functionality for real-time applications and control mechanisms.

The 80C196NU, on the other hand, is designed for lower power operation, making it suitable for battery-powered devices. This microcontroller maintains similar features to the 8XC196NP while offering advancements that support low-power consumption. The 80C196NU can also function in a range of temperature environments, making it adaptable for industrial applications.

Both the 8XC196NP and 80C196NU support external memory interfacing, allowing designers to expand the system's capability by connecting additional ROM and RAM. This flexibility makes them appealing for developing complex systems, such as motor controls, industrial automation, and consumer electronics.

Another standout feature of these microcontrollers is their built-in debugging capabilities. Intel provided hardware and software tools that enabled developers to test and troubleshoot their applications effectively, reducing the development time and increasing reliability.

Overall, the Intel 8XC196NP and 80C196NU microcontrollers stand out for their dependability, versatility, and performance, contributing significantly to the evolution of embedded system design. Their legacy continues to influence modern microcontroller technology, ensuring their relevance in a wide array of applications today.