Intel 8XC196NP, Microcontroller Idle Mode, Clock Control During Power-saving Modes 80C196NU

SPECIAL OPERATING MODES

		Disable
		PLL
		(Powerdown)
XTAL1	FXTAL1					Phase	Filter
						Comparator
	XTAL1
	F	XTAL1				Phase-
XTAL2						locked
						Oscillator
		2F
	Disable	XTAL1	Disable Clock Input			Phase-locked Loop
	Oscillator		(Powerdown)
						Clock Multiplier
		4F
	(Powerdown)
		f	Divide-by-two
			Circuit
	PLLEN1		f		Disable Clocks
			2	(Standby, Powerdown)
	PLLEN2					Peripheral Clocks (PH1, PH2)
			Clock			CLKOUT
			Generators
						CPU Clocks (PH1, PH2)
					Disable Clocks
				(Idle, Standby, Powerdown)
							A3063-02

Figure 12-2. Clock Control During Power-saving Modes (80C196NU)

12.3 IDLE MODE

In idle mode, the device’s power consumption decreases to approximately 40% of normal con- sumption. Internal logic holds the CPU clocks at logic zero, causing the CPU to stop executing instructions. Neither the phased-locked loop circuitry (80C196NU only), the peripheral clocks, nor CLKOUT are affected, so the special-function registers (SFRs) and register RAM retain their data and the peripherals and interrupt system remain active. Table B-5 on page B-13 lists the val- ues of the pins during idle mode.

12-5