Intel Microcontroller, 80C196NU, 8XC196NP manual Eport Block Diagram

I/O PORTS

Internal Bus			I/O MUX
EP_REG		Address MUX	I/O		VCC
			(0)
	EPC	CODE			Data
Extended Code Address			ADR
(from CPU)
			(1)		Q1
64K	Force Page 00H
Extended Data Address	EDAR	DATA			I/O Pin
(from CPU)					Combinational
1M					Logic
		Data/Address Control
MODE64 Control		(from Bus Controller)
					Q2
(from CPU)
EP_MODE					Mode
EP_DIR					Direction
			Sample		VSS
			Latch
			EP_PIN		Buffer
			Q	D
			LE
Read Port
			PH1 Clock

NOTE: Shaded area is unique to the 80C196NU.

A3113-01

Figure 7-2. EPORT Block Diagram

If EP_MODE.x is set (address mode), the address multiplexer determines the address source. For an instruction fetch, the address multiplexer is set to the CODE input, which selects the extended program counter (EPC) as the address source. For a data fetch, or when there is no external bus activity, the address multiplexer is set to the DATA input, which selects the extended data address register (EDAR) as the address source.

The EDAR is loaded from two different sources, depending on whether the data access is extend- ed or nonextended. For extended data accesses, the data multiplexer is set to the 1-Mbyte mode input and EDAR is loaded with the extended address. For nonextended data accesses, the data multiplexer is set to the 64-Kbyte mode input and EDAR is loaded from EP_REG. The last value loaded remains in EDAR until the next data access. (Refer to “Fetching Code and Data in the 1- Mbyte and 64-Kbyte Modes” on page 5-23 for more information.)

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