Intel 80C196NU, 8XC196NP, Microcontroller manual Figures

		CONTENTS
	FIGURES
Figure		Page
2-1	8XC196NP and 80C196NU Block Diagram	2-2
2-2	Block Diagram of the Core	2-3
2-3	Clock Circuitry (8XC196NP)	2-7
2-4	Clock Circuitry (80C196NU)	2-8
2-5	Internal Clock Phases	2-9
2-6	Effect of Clock Mode on CLKOUT Frequency	2-10
3-1	Accumulator (ACC_0x) Register	3-4
3-2	Accumulator Control and Status (ACC_STAT) Register	3-5
5-1	16-Mbyte Address Space	5-2
5-2	Pages FFH and 00H	5-3
5-3	Register File Memory Map	5-10
5-4	Windowing	5-13
5-5	Window Selection (WSR) Register	5-14
5-6	Window Selection 1 (WSR1) Register	5-15
5-7	The 24-bit Program Counter	5-23
5-8	Formation of Extended and Nonextended Addresses	5-24
5-9	A 64-Kbyte System With an 8-bit Bus	5-27
5-10	A 64-Kbyte System with Additional Data Storage	5-29
5-11	Example System Using the 1-Mbyte Mode	5-31
6-1	Flow Diagram for PTS and Standard Interrupts	6-2
6-2	Standard Interrupt Response Time	6-9
6-3	PTS Interrupt Response Time	6-9
6-4	PTS Select (PTSSEL) Register	6-11
6-5	Interrupt Mask (INT_MASK) Register	6-12
6-6	Interrupt Mask 1 (INT_MASK1) Register	6-13
6-7	Interrupt Pending (INT_PEND) Register	6-16
6-8	Interrupt Pending 1 (INT_PEND1) Register	6-17
6-9	PTS Control Blocks	6-18
6-10	PTS Service (PTSSRV) Register	6-19
6-11	PTS Mode Selection Bits (PTSCON Bits 7:5)	6-20
6-12	PTS Control Block — Single Transfer Mode	6-21
6-13	PTS Control Block — Block Transfer Mode	6-24
6-14	A Generic PWM Waveform	6-27
6-15	PTS Control Block — PWM Toggle Mode	6-29
6-16	EPA and PTS Operations for the PWM Toggle Mode Example	6-31
6-17	PTS Control Block — PWM Remap Mode	6-34
6-18	EPA and PTS Operations for the PWM Remap Mode Example	6-36
7-1	Bidirectional Port Structure	7-5
7-2	EPORT Block Diagram	7-13
7-3	EPORT Structure	7-15
8-1	SIO Block Diagram	8-1
8-2	Typical Shift Register Circuit for Mode 0	8-4
8-3	Mode 0 Timing	8-5
8-4	Serial Port Frames for Mode 1	8-6

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