Intel Microcontroller, 80C196NU, 8XC196NP manual Fet

	GLOSSARY
far data	Data that can be accessed only with extended instruc-
	tions. See also near data.
FET	Field-effect transistor.
f	Lowercase “f” represents the frequency of the internal
	clock. For the 8XC196NP, f is always equal to FXTAL1
	(the input frequency on XTAL1). For the 80C196NU,
	which employs a phase-locked loop with clock
	multiplier circuitry, f is equal to either FXTAL1,
	2FXTAL1, or 4FXTAL1. The multiplier depends on the
	clock mode, which is controlled by the PLLEN1 and
	PLLEN2 input pins. (Figure 2-4 on page 2-8
	illustrates the clock circuitry of the 80C196NU.)
fractional mode	A mode of the multiply-accumulatefunction in which
	the multiplier result is shifted left one bit before being
	written to the accumulator. This left shift eliminates
	the extra sign bit when both operands are signed,
	leaving a correctly signed result.
hold latency	The time it takes the microcontroller to assert HLDA#
	after an external device asserts HOLD#.
input leakage	Current leakage from an input pin to power or ground.
integer	Any member of the set consisting of the positive and
	negative whole numbers and zero.
INTEGER	A 16-bit, signed variable with values from –2 15
	through +215–1.
internal address	The 24-bit address that the microcontroller generates.
	See also external address.
interrupt controller	The module responsible for handling interrupts that
	are to be serviced by interrupt service routines that
	you provide. Also called the programmable interrupt
	controller (PIC).
interrupt latency	The total delay between the time that an interrupt is
	generated (not acknowledged) and the time that the
	device begins executing the interrupt service routine
	or PTS routine.
interrupt service routine	A software routine that you provide to service a
	standard interrupt. See also PTS routine.
interrupt vector	A location in special-purpose memory that holds the
	starting address of an interrupt service routine.
	Glossary-3