Intel 80C196NU Pulse-width Modulator PWM, Special Operating Modes, Reducing Power Consumption

8XC196NP, 80C196NU USER’S MANUAL

Timer 1 and timer 2 are both 16-bit up/down timer/counters that can be clocked internally or ex- ternally. Each timer/counter is called a timer if it is clocked internally and a counter if it is clocked externally. See Chapter 10, “Event Processor Array (EPA),” for additional information on the EPA and timer/counters.

2.5.4Pulse-width Modulator (PWM)

The output waveform from each PWM channel is a variable duty-cycle pulse with a programma- ble frequency that occurs every 256 or 512 state times (for the 8XC196NP) or every 256, 512, or 1024 state times (for the 80C196NU), as programmed. Several types of motors require a PWM waveform for most efficient operation. When filtered, the PWM waveform produces a DC level that can change in 256 steps by varying the duty cycle. See Chapter 9, “Pulse-width Modulator,” for more information.

2.6SPECIAL OPERATING MODES

In addition to the normal execution mode, the device operates in several special-purpose modes. Idle and powerdown modes conserve power when the device is inactive. An additional power conservation mode, standby, is available on the 80C196NU. On-circuit emulation (ONCE) mode electrically isolates the microcontroller from the system. See Chapter 12, “Special Operating Modes,” for more information about idle, powerdown, standby, and ONCE modes.

2.6.1Reducing Power Consumption

The power saving modes selectively disable internal clocks to reduce power consumption. Figure 2-3 on page 2-7 and Figure 2-4 on page 2-8 illustrate the clock circuitry of the 8XC196NP and 80C196NU, respectively.

In idle mode, the CPU stops executing instructions, but the peripheral clocks remain active. Pow- er consumption drops to about 40% of normal execution mode consumption. Either a hardware reset or any enabled interrupt source will bring the device out of idle mode.

The 80C196NU has an additional power saving mode, standby. In standby mode, all internal clocks are frozen at logic state zero, but the oscillator and phase-locked loop continue to run. Power consumption drops to about 10% of normal execution mode consumption. Either a hard- ware reset or any enabled external interrupt source will bring the device out of standby mode.

In powerdown mode, all internal clocks are frozen at logic state zero and the oscillator is shut off. The register file and most peripherals retain their data if VCC is maintained. Power consumption drops into the µW range.

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