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Intel 80C196NU, 8XC196NP, Microcontroller manual Shral Arithmetic Right Shift Double

Models: Microcontroller 80C196NU 8XC196NP

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8XC196NP, 80C196NU USER’S MANUAL

Table A-6. Instruction Set (Continued)

Mnemonic

 

 

Operation

 

 

 

 

 

Instruction Format

 

 

 

 

 

SHRAL

ARITHMETIC RIGHT SHIFT DOUBLE-

 

 

 

WORD. Shifts the destination double-word

SHRAL

lreg,#count

 

operand to the right as many times as

 

(00001110) (count) (lreg)

 

specified by the count operand. The count

 

 

 

 

may be specified either as an immediate

or

 

 

value in the range of 0 to 15 (0FH), inclusive,

SHRAL

lreg,breg

 

or as the content of any register (10H –

 

(00001110) (breg) (lreg)

 

0FFH) with a value in the range of 0 to 31

 

 

 

 

(1FH), inclusive. If the original high order bit

 

 

 

value was “0,” zeros are shifted in. If the

NOTES:

This instruction clears the

 

value was “1,” ones are shifted in.

 

 

 

 

 

 

sticky bit flag at the beginning

 

Temp ← (COUNT)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

of the instruction. If at any time

 

do while Temp ≠ 0

 

 

 

 

 

 

 

 

during the shift a “1” is shifted

 

C ← Low order bit of (DEST)

 

 

 

into the carry flag and another

 

(DEST) ← (DEST)/2

 

 

 

 

 

 

shift cycle occurs, the instruc-

 

Temp ← Temp – 1

 

 

 

 

 

 

tion sets the sticky bit flag.

 

end_while

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

In this operation, DEST/2 rep-

 

 

 

PSW Flag Settings

 

 

 

resents signed division.

 

 

Z

N

 

C

 

V

VT

 

ST

 

 

 

 

 

✓

✓

 

✓

 

0

—

 

✓

 

 

 

 

 

 

 

 

SHRB

LOGICAL RIGHT SHIFT BYTE. Shifts the

 

 

 

destination byte operand to the right as many

SHRB

breg,#count

 

times as specified by the count operand. The

 

(00011000) (count) (breg)

 

count may be specified either as an

 

 

 

 

 

or

 

 

immediate value in the range of 0 to 15

 

 

(0FH), inclusive, or as the content of any

SHRB

breg,breg

 

register (10H – 0FFH) with a value in the

 

(00011000) (breg) (breg)

 

range of 0 to 31 (1FH), inclusive. The left bits

 

 

 

 

of the result are filled with zeros. The last bit

 

 

 

shifted out is saved in the carry flag.

NOTES:

This instruction clears the

 

Temp ← (COUNT)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

sticky bit flag at the beginning

 

do while Temp ≠ 0

 

 

 

 

 

 

 

 

of the instruction. If at any time

 

C ← Low order bit of (DEST)

 

 

 

during the shift a “1” is shifted

 

(DEST) ← (DEST)/2

 

 

 

 

 

 

into the carry flag and another

 

Temp ← Temp–1

 

 

 

 

 

 

shift cycle occurs, the instruc-

 

end_while

 

 

 

 

 

 

 

 

 

 

tion sets the sticky bit flag.

 

 

 

 

 

 

 

 

 

 

 

In this operation, DEST/2 rep-

 

 

 

PSW Flag Settings

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

resents unsigned division.

 

 

Z

N

 

C

 

V

VT

 

ST

 

 

 

 

 

 

 

 

 

 

 

 

✓

0

 

✓

 

0

—

 

✓

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A-40

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Page 345
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Intel 80C196NU, 8XC196NP, Microcontroller manual Shral Arithmetic Right Shift Double
Page 344 Page 346

Microcontroller, 80C196NU, 8XC196NP specifications

The Intel 8XC196NP and 80C196NU microcontrollers are part of Intel's renowned 16-bit microcontroller series that gained popularity in the 1980s and 1990s for embedded systems applications. Designed for a variety of applications, these microcontrollers are characterized by their robust performance, versatility, and industry-standard architecture.

The 8XC196NP features an enhanced instruction set with over 100 instructions, allowing for efficient code execution. It operates at clock speeds up to 16 MHz, which contributes to improved performance in time-sensitive applications. The microcontroller is equipped with a 16-bit data bus, enabling more efficient data handling compared to its 8-bit predecessors, thus accommodating complex algorithms and large data sets.

In terms of memory architecture, the 8XC196NP supports an addressable memory space of up to 64 KB of program memory and 64 KB of data memory. This configuration provides sufficient space for large applications while ensuring fast data access. The microcontroller includes integrated features such as timers, serial I/O capabilities, and interrupt processing, which enhance its functionality for real-time applications and control mechanisms.

The 80C196NU, on the other hand, is designed for lower power operation, making it suitable for battery-powered devices. This microcontroller maintains similar features to the 8XC196NP while offering advancements that support low-power consumption. The 80C196NU can also function in a range of temperature environments, making it adaptable for industrial applications.

Both the 8XC196NP and 80C196NU support external memory interfacing, allowing designers to expand the system's capability by connecting additional ROM and RAM. This flexibility makes them appealing for developing complex systems, such as motor controls, industrial automation, and consumer electronics.

Another standout feature of these microcontrollers is their built-in debugging capabilities. Intel provided hardware and software tools that enabled developers to test and troubleshoot their applications effectively, reducing the development time and increasing reliability.

Overall, the Intel 8XC196NP and 80C196NU microcontrollers stand out for their dependability, versatility, and performance, contributing significantly to the evolution of embedded system design. Their legacy continues to influence modern microcontroller technology, ensuring their relevance in a wide array of applications today.