Intel 8XC196NP, 80C196NU, Microcontroller manual Shll, Shr

8XC196NP, 80C196NU USER’S MANUAL

Table A-6. Instruction Set (Continued)

Mnemonic			Operation						Instruction Format
SHLL	SHIFT DOUBLE-WORD LEFT. Shifts the
	destination double-word operand to the left							SHLL	lreg,#count
	as many times as specified by the count
								(00001101) (count) (breg)
	operand. The count may be specified either
								or
	as an immediate value in the range of 0 to 15
	(0FH), inclusive, or as the content of any							SHLL	lreg,breg
	register (10H – 0FFH) with a value in the
								(00001101) (breg) (lreg)
	range of 0 to 31 (1FH), inclusive. The right
	bits of the result are filled with zeros. The last
	bit shifted out is saved in the carry flag.
	Temp ← (COUNT)
	do while Temp ≠ 0
	C ← High order bit of (DEST)
	(DEST) ← (DEST) × 2
	Temp ← Temp – 1
	end_while
			PSW Flag Settings
		Z	N	C	V	VT	ST
		✓	✓	✓	✓	−	—
SHR	LOGICAL RIGHT SHIFT WORD. Shifts the
	destination word operand to the right as							SHR	wreg,#count
	many times as specified by the count
								(00001000) (count) (wreg)
	operand. The count may be specified either
								or
	as an immediate value in the range of 0 to 15
	(0FH), inclusive, or as the content of any							SHR	wreg,breg
	register (10H – 0FFH) with a value in the
								(00001000) (breg) (wreg)
	range of 0 to 31 (1FH), inclusive. The left bits
	of the result are filled with zeros. The last bit
	shifted out is saved in the carry flag.							NOTES:	This instruction clears the
	Temp ← (COUNT)
									sticky bit flag at the beginning
	do while Temp ≠ 0								of the instruction. If at any time
	C ← Low order bit of (DEST)								during the shift a “1” is shifted
	(DEST) ← (DEST)/2								into the carry flag and another
	Temp ← Temp – 1								shift cycle occurs, the instruc-
	end_while								tion sets the sticky bit flag.
									In this operation, DEST/2 rep-
			PSW Flag Settings
									resents unsigned division.
		Z	N	C	V	VT	ST
		✓	0	✓	0	—	✓

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