Intel 80C196NU, 8XC196NP manual State Times at Various Frequencies, 12.5 MHz, 25 MHz, 50 MHz, PH2

ARCHITECTURAL OVERVIEW

XTAL1

t t

1 State Time 1 State Time

PH1

PH2

CLKOUT

Phase 1 Phase 2 Phase 1 Phase 2

A0805-01

Figure 2-5. Internal Clock Phases

The combined period of phase 1 and phase 2 of the internal CLKOUT signal defines the basic time unit known as a state time or state. Table 2-2 lists state time durations at various frequencies.

Table 2-2. State Times at Various Frequencies

f
(Frequency Input to the	State Time
Divide-by-two Circuit)
12.5 MHz	160 ns
25 MHz	80 ns
50 MHz	40 ns

The following formulas calculate the frequency of PH1 and PH2, the duration of a state time, and the duration of a clock period (t).

f	PH2	2	1
PH1 (in MHz) = --=		State Time (in µs) = --	t = --
2		f	f

Because the device can operate at many frequencies, this manual defines time requirements (such as instruction execution times) in terms of state times rather than specific measurements. Datasheets list AC characteristics in terms of clock periods (t).

For the 80C196NU, Table 2-3 details the relationships between the input frequency (FXTAL1), the configuration of PLLEN1 and PLLEN2, the operating frequency (f), the clock period (t), and state times. Figure 2-6 illustrates the timing relationships between the input frequency (FXTAL1), the operating frequency (f), and the CLKOUT signal with each of the three valid PLLENx pin configurations. (Since the maximum operating frequency is 50 MHz, only a 12.5 MHz external clock frequency allows all three clock modes.)

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