Intel 80C196NU, 8XC196NP manual Using AN External Clock Source, External Clock Connections

MINIMUM HARDWARE CONSIDERATIONS

11.5 USING AN EXTERNAL CLOCK SOURCE

To use an external clock source, apply a clock signal to XTAL1 and let XTAL2 float (Figure 11-5). To ensure proper operation, the external clock source must meet the minimum high and

low times (TXHXX and TXLXX) and the maximum rise and fall transition times (TXLXH and TXHXL) (Figure 11-6). The longer the rise and fall times, the higher the probability that external noise will

affect the clock generator circuitry and cause unreliable operation. See the datasheet for required XTAL1 voltage drive levels and actual specifications.

VCC

External Clock Input

4.7 kن

XTAL1

Clock Driver

8XC196 Device

No Connection

XTAL2

†Required if TTL driver is used. Not needed if CMOS driver is used.

A0274-02

Figure 11-5. External Clock Connections

TXHXX TXLXH

	0.7 VCC + 0.5 V		T			0.7 VCC + 0.5 V
			XLXX
XTAL1		0.3 VCC – 0.5 V			0.3 VCC – 0.5 V
				T
					XLXL

TXHXL

A2119-02

Figure 11-6. External Clock Drive Waveforms

At power-on, the interaction between the internal amplifier and its feedback capacitance (i.e., the Miller effect) may cause a load of up to 100 pF at the XTAL1 pin if the signal at XTAL1 is weak (such as might be the case during start-up of the external oscillator). This situation will go away when the XTAL1 input signal meets the VIL and VIH specifications (listed in the datasheet). If these specifications are met, the XTAL1 pin capacitance will not exceed 20 pF.

11-7