Intel 80C196NU, 8XC196NP, Microcontroller manual Generating a Medium-speed PWM Output

Models: Microcontroller 80C196NU 8XC196NP

1 471
Download 471 pages 22.3 Kb
Page 210
Image 210

EVENT PROCESSOR ARRAY (EPA)

The maximum output frequency depends upon the total interrupt latency and the interrupt-service execution times used by your system. As additional EPA channels and the other functions of the microcontroller are used, the maximum PWM frequency decreases because the total interrupt la- tency and interrupt-service execution time increases. To determine the maximum, low-speed PWM frequency in your system, calculate your system's worst-case interrupt latency and worst- case interrupt-service execution time, and then add them together. The worst-case interrupt la- tency is the total latency of all the interrupts (both normal and PTS) used in your system. The worst-case interrupt-service execution time is the total execution time of all interrupt service rou- tines and PTS routines.

Assume a system with a single EPA channel, a single enabled interrupt, and the following inter- rupt service routine.

;If EPA0-3 interrupt is generated EPA0-3_ISR:

PUSHA

LD EPAx_CON, #toggle_command

ADD EPAx_TIME, TIMERx, [next_duty_ptr]; Load next event time

POPA

RET

The worst-case interrupt latency for a single-interrupt system is 56 state times for external stack usage and 54 state times for internal stack usage (see “Standard Interrupt Latency” on page 6-8). To determine the execution time for an interrupt service routine, add up the execution time of the instructions (Table A-9).

The total execution time for the ISR that services interrupts EPA3:0 is 79 state times for external stack usage or 71 state times for internal stack usage. Therefore, a single capture/compare channel 0–3 can be updated every 125 state times assuming internal stack us age (54 + 71). Each PWM period requires two updates (one setting and one clearing), so the execution time for a PWM pe- riod equals 250 state times. When the input frequency on XTAL1 is 25 MHz and the phase-locked loop is disabled on the 80C196NU, the PWM period is 20 µs and the maximum PWM frequency is 50 kHz.

10.4.2.2Generating a Medium-speed PWM Output

You can generate a medium-speed, pulse-width modulated output with a single EPA channel and the PTS set up in PWM toggle mode. “PWM Toggle Mode Example” on page 6-27 describes how to configure the EPA and PTS. Once started, this method requires no CPU intervention unless you need to change the output frequency. The method uses a single timer/counter. The timer/counter is not interrupted during this process, so other EPA channels can also use it if they do not reset it.

10-13

Page 210
Image 210
Intel 80C196NU, 8XC196NP, Microcontroller manual Generating a Medium-speed PWM Output