Manuals / Intel / Personal Care / Microscope & Magnifier

Intel 80C196NU, 8XC196NP Reset, Output Enable, Complementary Output Mode, Open-drain Output Mode

Models: Microcontroller 80C196NU 8XC196NP

1 471
Download 471 pages 22.3 Kb
Page 159
Image 159

8XC196NP, 80C196NU USER’S MANUAL

The 8XC196NP allows you to change the value of EP_REG to control which memory page a non- extended instruction accesses. However, software tools require that EP_REG be equal to 00H. The 80C196NU forces all nonextended data accesses to page 00H. You cannot use EP_REG to change pages.

You can read EP_PIN at any time to determine the value of a pin. When EP_PIN is read, the con- tents of the sample latch are output onto the internal bus.

Figure 7-3 shows a circuit schematic for a single bit of the EPORT. Q1 and Q2 are the strong com- plementary drivers for the pin. Q1 can source at least –3 mA at V CC – 0.7 volts. Q2 can sink at least 3 mA at VSS + 0.45 volts. (Consult the datasheet for specifications.) Resistor R1 provides ESD protection for the pin.

7.3.1.1Reset

During reset, the falling edge of RESET# generates a short pulse that turns on the medium pull- up transistor Q3, which remains on for about 300 ns, causing the pin to change rapidly to its reset state. The active-low level of RESET# turns on transistor Q4, which weakly holds the pin high. (Q4 can source approximately –10 μΑ; consult the datasheet for exact specifications.) When RESET# is inactive, both Q3 and Q4 are off; Q1 and Q2 determine output drive.

7.3.1.2Output Enable

If RESET#, HOLD#, idle, or powerdown is asserted, the gates that control Q1 and Q2 are dis- abled and Q1 and Q2 remain off. Otherwise, the gates are enabled and complementary or open- drain operation is possible.

7.3.1.3Complementary Output Mode

For complementary output mode, the gates that control Q1 and Q2 must be enabled. The Q2 gate is always enabled (except when RESET#, HOLD#, idle, or powerdown is asserted). Either clear- ing EP_DIR (selecting complementary mode) or setting EP_MODE (selecting address mode) en- ables the logic gate preceding Q1. The value of DATA determines which transistor is turned on. If DATA is equal to one, Q1 is turned on and the pin is pulled high. If DATA is equal to zero, Q2 is turned on and the pin is pulled low.

7.3.1.4Open-drain Output Mode

For open-drain output mode, the gate that controls Q1 must be disabled. Setting EP_DIR (select- ing open-drain mode) and clearing EP_MODE (selecting I/O mode) disables the logic gate pre- ceding Q1. The value of DATA determines whether Q2 is turned on. If DATA is equal to one, both Q1 and Q2 remain off and the pin is left in high-impedance state (floating). If DATA is equal to zero, Q2 is turned on and the pin is pulled low.

7-14

Page 158 Page 160
Page 159
Image 159
Intel 80C196NU, 8XC196NP, Microcontroller manual Reset, Output Enable, Complementary Output Mode, Open-drain Output Mode
Page 158 Page 160

Microcontroller, 80C196NU, 8XC196NP specifications

The Intel 8XC196NP and 80C196NU microcontrollers are part of Intel's renowned 16-bit microcontroller series that gained popularity in the 1980s and 1990s for embedded systems applications. Designed for a variety of applications, these microcontrollers are characterized by their robust performance, versatility, and industry-standard architecture.

The 8XC196NP features an enhanced instruction set with over 100 instructions, allowing for efficient code execution. It operates at clock speeds up to 16 MHz, which contributes to improved performance in time-sensitive applications. The microcontroller is equipped with a 16-bit data bus, enabling more efficient data handling compared to its 8-bit predecessors, thus accommodating complex algorithms and large data sets.

In terms of memory architecture, the 8XC196NP supports an addressable memory space of up to 64 KB of program memory and 64 KB of data memory. This configuration provides sufficient space for large applications while ensuring fast data access. The microcontroller includes integrated features such as timers, serial I/O capabilities, and interrupt processing, which enhance its functionality for real-time applications and control mechanisms.

The 80C196NU, on the other hand, is designed for lower power operation, making it suitable for battery-powered devices. This microcontroller maintains similar features to the 8XC196NP while offering advancements that support low-power consumption. The 80C196NU can also function in a range of temperature environments, making it adaptable for industrial applications.

Both the 8XC196NP and 80C196NU support external memory interfacing, allowing designers to expand the system's capability by connecting additional ROM and RAM. This flexibility makes them appealing for developing complex systems, such as motor controls, industrial automation, and consumer electronics.

Another standout feature of these microcontrollers is their built-in debugging capabilities. Intel provided hardware and software tools that enabled developers to test and troubleshoot their applications effectively, reducing the development time and increasing reliability.

Overall, the Intel 8XC196NP and 80C196NU microcontrollers stand out for their dependability, versatility, and performance, contributing significantly to the evolution of embedded system design. Their legacy continues to influence modern microcontroller technology, ensuring their relevance in a wide array of applications today.