Intel 80C196NU, 8XC196NP, Microcontroller manual Contents

			CONTENTS
4.5.1		Using Registers	4-12
4.5.2		Addressing 32-bit Operands	4-12
4.5.3		Addressing 64-bit Operands	4-12
4.5.4		Linking Subroutines	4-13
4.6 SOFTWARE PROTECTION FEATURES AND GUIDELINES			4-14
CHAPTER 5
MEMORY PARTITIONS
5.1	MEMORY MAP OVERVIEW		5-1
5.2	MEMORY PARTITIONS		5-3
5.2.1		External Memory	5-5
5.2.2 Program and Special-purpose Memory			5-5
5.2.2.1 Program Memory in Page FFH			5-5
5.2.2.2		Special-purpose Memory	5-6
5.2.2.3		Reserved Memory Locations	5-7
5.2.2.4 Interrupt and PTS Vectors			5-7
5.2.2.5		Chip Configuration Bytes	5-7
5.2.3		Peripheral Special-function Registers (SFRs)	5-7
5.2.4		Register File	5-9
5.2.4.1		General-purpose Register RAM	5-11
5.2.4.2		Stack Pointer (SP)	5-11
5.2.4.3		CPU Special-function Registers (SFRs)	5-12
5.3	WINDOWING		5-13
5.3.1		Selecting a Window	5-14
5.3.2 Addressing a Location Through a Window			5-16
5.3.2.1		32-byte Windowing Example	5-18
5.3.2.2		64-byte Windowing Example	5-18
5.3.2.3		128-byte Windowing Example	5-18
5.3.2.4 Unsupported Locations Windowing Example (8XC196NP Only)			5-19
5.3.2.5 Using the Linker Locator to Set Up a Window			5-19
5.3.3 Windowing and Addressing Modes			5-21
5.4 REMAPPING INTERNAL ROM (83C196NP ONLY)			5-22
5.5 FETCHING CODE AND DATA IN THE 1-MBYTE AND 64-KBYTE MODES			5-23
5.5.1		Fetching Instructions	5-23
5.5.2		Accessing Data	5-23
5.5.3 Code Fetches in the 1-Mbyte Mode			5-25
5.5.4 Code Fetches in the 64-Kbyte Mode			5-25
5.5.5 Data Fetches in the 1-Mbyte and 64-Kbyte Modes			5-26
5.6	MEMORY CONFIGURATION EXAMPLES		5-27
5.6.1 Example 1: Using the 64-Kbyte Mode			5-27
5.6.2 Example 2: A 64-Kbyte System with Additional Data Storage			5-29
5.6.3 Example 3: Using 1-Mbyte Mode			5-31

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