Intel Microcontroller manual Code Fetches in the 1-Mbyte Mode, Code Fetches in the 64-Kbyte Mode

MEMORY PARTITIONS

5.5.3Code Fetches in the 1-Mbyte Mode

CCR1.1 (the MODE64 bit) controls whether the device operates in 1-Mbyte or 64-Kbyte mode. CCR1 is loaded with the contents of CCB1 at reset. When MODE64 is clear, the device operates in 1-Mbyte mode. In this mode, code can execute from any page in the 1-Mbyte address space. An extended jump, branch, or call instruction across pages changes the EPC value to the destina- tion page. For example, assume that code is executing from page FFH. The following code seg- ment branches to an external memory location in page 00H and continues execution.

0FF2090H:	LD	TEMP,#12H	; code		executing	in page FFH
	ST	TEMP,PORT1	; code		executing	in page FFH
	EBR	003000H	;	jump	to location 3000H		in page 00H
003000H:	ADD	TEMP,#50H	;	code	executing in page		00H

Code fetches are from external memory or internal memory, depending on the device, the instruc- tion address, and the value of the EA# input.

80C196NU:

Code executes from any page in external memory.

80C196NP:

For devices without internal nonvolatile memory, EA# must be tied low, and code executes from any page in external memory.

83C196NP:

Code in all locations except FF2000–FF2FFFH executes from external memory.

Instruction fetches from FF2000–FF2FFFH are controlled by the EA# input:

•If EA# is low, code executes from external memory.

•If EA# is high, code executes from internal ROM.

Note that the EA# input functions only for the address range FF2000–FF2FFFH.

5.5.4Code Fetches in the 64-Kbyte Mode

CCR1.1 (the MODE64 bit) controls whether the device operates in 1-Mbyte or 64-Kbyte mode. CCR1 is loaded with the contents of CCB1 at reset. When MODE64 is set, the device operates in 64-Kbyte mode. In this mode, the EPC (Figure 5-7 on page 5-23) is fixed at FFH, which allows instructions to execute from page FFH only. Extended jump, branch, and call instructions do not function in the 64-Kbyte mode.

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