
SRIO Registers |
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DEV_INFO 183 |
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DEVICE_VENDORIDENTITY field of DEV_ID 182 | |
DEVICEID_MSB field of PW_TGT_ID 218 | |
DEVICEID_REG1 | 121 |
DEVICEID_REG2 | 122 |
device ID capture CSR for logical/transport errors 216 | |
device identity CAR | 182 |
DEVICEIDENTITY field of DEV_ID 182 | |
DEVICEID field of PW_TGT_ID 218 | |
device IDs |
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base device ID for host PE 194
base device ID for large common transport system 193
base device ID for small common transport system 193
device ID for
disable base ID match requirement field for ports 231 flow control destination ID size field 181
lower boundary for packet forwarding
8-bit IDs 124
node ID field to compare to incoming destination ID 122
node ID field to supply outgoing source ID 121
size selection field for LSUn 159 |
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upper boundary for packet forwarding |
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123 |
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device information CAR | 183 |
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device revision field 183 |
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device type field 182 |
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device wakeup after bootloading | 80 |
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differential signals/pins | 25 |
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direct I/O |
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data path description | 39 |
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introduction | 35 |
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RX operation | 42 |
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TX operation | 40 |
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disable error checking for port n | 207 |
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disable port n | 207 |
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DISCOVERED field of SP_GEN_CTL | 199 |
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DISCOVERY_TIMER field of |
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SP_IP_DISCOVERY_TIMER 230 |
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DMA bus |
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considerations regarding CPU interrupts | 85 | ||||
in data path description for LSUs 39 |
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in direct I/O RX operation 42 |
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in Load/Store module data flow diagram | 39 | ||||
in message passing | 43 |
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in SRIO component block diagram | 26 |
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DMA clock frequency as variable in clock prescaling
233 |
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DMA error status bit for MAU 211 |
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doorbell information field for LSUn 160 |
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doorbell interrupt condition clear registers | 133 | |
doorbell interrupt condition routing registers | 144 | |
244 | Index |
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doorbell interrupt condition status registers 132 DOORBELLn_ICCR 133 DOORBELLn_ICRR 144 DOORBELLn_ICRR2 144 DOORBELLn_ICSR 132
doorbell operation 63 doorbell packets
Ftype and Ttype 25 packet header 64 priority 64
used to cause CPU interrupts 85
doorbell support for source device | 188 | |
DRBLL_INFO field of LSUn_REG5 | 160 | |
drop packet enable for port n | 207 |
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DSP address field for LSUn | 157 |
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EF_ID field of ERR_RPT_BH | 209 |
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EF_ID field of SP_MB_HEAD | 196 |
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EF_PTR field of ERR_RPT_BH | 209 | ||
EF_PTR field of SP_MB_HEAD | 196 | ||
emulation 74 |
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EN_STAT field of BLKn_EN_STAT | 120 | ||
enable and enable status registers | 71 |
enable bit(s)
for access to
for adaptive equalizer 125 |
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for entire SRIO peripheral | 116 |
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for | 128 | ||
for flow control 112 |
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for logical blocks 119 |
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for port idle error checking | 231 |
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for port | |||
for port | 231 | ||
for port n 207 |
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for port reset interrupt 232 |
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for port | 231 |
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for |
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for SERDES PLLs | 115, 131 |
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for SERDES receivers 126 |
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for SERDES transmitters | 129 |
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enable input only for port n | 207 |
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enable | |||
enable output only for port n | 207 |
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enable status bit(s) |
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for entire SRIO peripheral | 117 |
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for logical blocks 0 through 8 117, 120 | |||
endianness 68 |
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EN field of BLKn_EN | 119 |
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EN field of GBL_EN | 116 |
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ENFTP field of SERDES_CFGTXn_CNTL 128 | |||
ENPLL1 field of PER_SET_CNTL | 113 |
SPRUE13A