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SRIO Registers |
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for doorbell interrupt conditions 144 | |
for error, reset, and special event (port) interrupt | |
conditions 149 |
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for LSU interrupt conditions | 147 |
RST_CS field of SP_IP_MODE | 231 |
RST_EN field of SP_IP_MODE | 231 |
rules for CPPI data traffic 43 |
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RX_CP field of QUEUEn_RXDMA_CP 167 | |
RX_CPPI_CNTL 173 |
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RX_CPPI_ICCR 135 |
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RX_CPPI_ICRR 145 |
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RX_CPPI_ICRR2 145 |
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RX_CPPI_ICSR 134 |
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RX_CPPI_SECURITY_ENABLE field of ERR_EN 212
RX_CPPI_SECURITY field of ERR_DET | 210 | ||
RX_HDP field of QUEUEn_RXDMA_HDP | 166 | ||
RX_IO_DMA_ACCESS field of ERR_DET | 210 | ||
RX_IO_SECURITY_ENABLE field of ERR_EN 212 | |||
RX_QUEUE_TEAR_DOWN 172 |
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RX buffer descriptor fields 47 |
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RX buffer descriptor |
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RX buffer descriptor queue teardown | 50 |
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RX CPPI security error |
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reporting enable field 213 |
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status bit 211 |
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RX I/O DMA access error |
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reporting enable field 213 |
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status field | 211 |
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RX shared buffer |
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in direct I/O RX operation 42 |
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in direct I/O TX READ transaction | 41 |
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in SRIO component block diagram | 26 |
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RXU |
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enable bit | 119 |
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enable status bits 117, 120 |
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handling of unavailable outbound credit | 76 | ||
in SRIO component block diagram | 26 |
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RXU_MAP registers |
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description | 177 |
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introduction | 45 |
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S
security error reporting enable bit for MAU | 213 | |||
security error reporting enable bit for RXU | 213 | |||
security error status bit for MAU | 211 |
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security error status bit for RXU | 211 |
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SEGMENT_MAPPING field of RXU_MAP_Hn | 178 | |||
segmentation of outbound direct I/O requests | 42 | |||
SELF_RST field of SP_IP_MODE 231 |
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self reset interrupt enable field for ports | 231 |
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SEND_DBG_PKT field of SPn_CTL_INDEP |
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send debug packet field for port n 237 |
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SERDES_CFGn_CNTL 130 |
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SERDES_CFGRXn_CNTL 125 |
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SERDES_CFGTXn_CNTL 128 |
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SERDES macro configuration register | 130 |
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252 | Index |
SERDES macros |
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configuration example 35 |
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description | 28 |
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enable bits | 115 |
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in SRIO component block diagram | 26 |
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in SRIO peripheral block diagram | 21 |
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PLL enabling 28 |
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receiver enabling 30 |
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transmitter enabling 33 |
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SERDES receive channel configuration registers | 125 | ||||
SERDES transmit channel configuration registers | 128 | ||||
serialization/deserialization (SERDES) 21 |
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serial port IP prescaler register | 233 |
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Serial RapidIO peripheral. See SRIO peripheral | 19 | ||||
shared buffers |
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in direct I/O RX operation 42 |
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in direct I/O TX READ transaction | 41 |
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in direct I/O TX WRITE transaction | 40 |
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in Load/Store module data flow diagram 39 |
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in message passing 43 |
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in SRIO component block diagram | 26 |
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SILENCE_TIMER field of SPn_SILENCE_TIMER | 238 | ||||
silent state period for port n 238 |
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reception | 180 |
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single port with 1x or 4x operation | 76 |
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small common transport system base device ID | 193 | ||||
SOFT_REC field of SPn_CTL_INDEP 236 |
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SOFT field of PCR 112 |
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soft stop bit | 112 |
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soft stop emulation mode 75 |
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software memory sleep override bit |
| 113 |
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software requirements for message passing 60 |
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software shutdown details 74 |
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sop field of RX buffer descriptor | 47 |
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sop field of TX buffer descriptor | 52 |
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source address field for LSUn | 157 |
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source ID associated with logical/transport error | 216 | ||||
source ID check or ignore field for message reception | |||||
180 |
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SOURCEID field of ID_CAPT 216 |
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SOURCEID field of RXU_MAP_Ln | 178 |
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source operations CAR 188 |
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SP_GEN_CTL 199 |
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SP_IP_DISCOVERY_TIMER 230 |
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SP_IP_IPW_IN_CAPTn 234 |
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SP_IP_MODE 231 |
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SP_LT_CTL 197 |
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SP_MB_HEAD 196 |
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SP_MODE field of SP_IP_MODE | 231 |
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SP_RT_CTL 198 |
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SPn_ACKID_STAT 202 |
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SPn_CS_TX | 240 |
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SPn_CTL 206
SPn_CTL_INDEP 236
SPn_ERR_ATTR_CAPT_DBG0 223
SPRUE13A