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SRIO Registers
5.84 Port n Attributes Error Capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0)
Each of the four ports is supported by a register of this type (see ). The port n attributes error capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0) is shown in Figure 147 and described in Table 163.
Table 162. SPn_ERR_ATTR_CAPT_DBG0 Registers and the Associated Ports
Register | Address Offset | Associated Port |
SP0_ERR_ATTR_CAPT_DBG0 | 2048h | Port 0 |
SP1_ERR_ATTR_CAPT_DBG0 | 2088h | Port 1 |
SP2_ERR_ATTR_CAPT_DBG0 | 20C8h | Port 2 |
SP3_ERR_ATTR_CAPT_DBG0 | 2108h | Port 3 |
Figure 147. Port n Attributes Error Capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0)
31 | 30 | 29 | 28 | 24 | 23 |
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INFO_TYPE |
| Reserved |
| ERROR_TYPE |
| IMP_SPECIFIC |
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| 4 | 3 | 1 | 0 |
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| IMP_SPECIFIC |
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| Reserved | CAPTURE_ |
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| VALID_INFO |
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LEGEND: R/W = Read/Write; R = Read only; |
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Table 163. Port n Attributes Error Capture CSR 0 (SPn_ERR_ATTR_CAPT_DBG0) Field
Descriptions
Bit | Field | Value | Description |
INFO_TYPE |
| Type of information logged | |
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| 00b | Packet |
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| 01b | Control symbol (only error capture register 0 is valid) |
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| 10b | Implementation specific (capture register contents are |
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| implementation specific) |
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| 11b | Reserved |
29 | Reserved | 0 | This |
ERROR_TYPE | Encoded value of captured error bit in the Port n Error Detect | ||
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| Register |
IMP_SPECIFIC | Implementation Dependent Error Information | ||
Reserved | 0 | These | |
0 | CAPTURE_VALID_INFO |
| Valid information captured |
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| 0 | The packet/control symbol capture registers do not contain valid |
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| information. |
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| 1 | The packet/control symbol capture registers contain valid |
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| information. For control symbols, only capture register 0 contains |
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| meaningful information. A software write of 0 clears this bit and |
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| subsequently unlocks all the capture registers of the port. |
SPRUE13A | Serial RapidIO (SRIO) | 223 |
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