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SRIO Functional Description

 

 

 

 

 

 

 

Figure 23. Weighted Round Robin Programming Registers (Address Offset 7E0h–7ECh)

 

TX_QUEUE_CNTL0 - Address Offset 7E0h

 

 

 

 

 

 

<--------------------------------

TX_Queue_Map3 -----------------------------

>

<--------------------------------

TX_Queue_Map2

-----------------------------

>

31

28

27

24

23

20

19

 

16

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0h

 

R/W-3h

 

 

R/W-0

 

R/W-2h

 

<--------------------------------

TX_Queue_Map1 -----------------------------

>

<--------------------------------

TX_Queue_Map0

-----------------------------

>

15

12

11

8

7

4

3

 

0

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0h

 

R/W-1h

 

 

R/W-0h

 

R/W-0h

 

TX_QUEUE_CNTL1 - Address Offset 7E4h

 

 

 

 

 

 

<--------------------------------

TX_Queue_Map7 -----------------------------

>

<--------------------------------

TX_Queue_Map6

-----------------------------

>

31

28

27

24

23

20

19

 

16

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0

 

R/W-7h

 

 

R/W-0h

 

R/W-6h

 

<--------------------------------

TX_Queue_Map5 -----------------------------

>

<--------------------------------

TX_Queue_Map4

-----------------------------

>

15

12

11

8

7

4

3

 

0

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0h

 

R/W-5h

 

 

R/W-0h

 

R/W-4h

 

TX_QUEUE_CNTL2 - Address Offset 7E8h

 

 

 

 

 

 

<--------------------------------

TX_Queue_Map11 -----------------------------

>

<--------------------------------

TX_Queue_Map10 -----------------------------

>

31

28

27

24

23

20

19

 

16

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0h

 

R/W-Bh

 

 

R/W-0h

 

R/W-Ah

 

<--------------------------------

TX_Queue_Map9 -----------------------------

>

<--------------------------------

TX_Queue_Map8

-----------------------------

>

15

12

11

8

7

4

3

 

0

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0h

 

R/W-9h

 

 

R/W-0h

 

R/W-8h

 

TX_QUEUE_CNTL3 - Address Offset 7ECh

 

 

 

 

 

 

<--------------------------------

TX_Queue_Map15 -----------------------------

>

<--------------------------------

TX_Queue_Map14 -----------------------------

>

31

28

27

24

23

20

19

 

16

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0h

 

R/W-Fh

 

 

R/W-0h

 

R/W-Eh

 

<--------------------------------

TX_Queue_Map13 -----------------------------

>

<--------------------------------

TX_Queue_Map12 -----------------------------

>

15

12

11

8

7

4

3

 

0

Number of Msgs

 

Queue Pointer

 

 

Number of Msgs

 

Queue Pointer

 

R/W-0h

 

R/W-Dh

 

 

R/W-0h

 

R/W-Ch

 

Table 22. Weighted Round Robin Programming Registers (Address Offset 7E0h–7ECh)

 

Field Pair

Register[Bits]

Field

Value

Description

 

TX_Queue_Map0

TX_QUEUE_CNTL0[3–0]

Queue Pointer

0h to Fh

Pointer to a queue. This pointer can be

 

 

 

 

 

programmed to point to any one of the 16

 

 

 

 

 

TX buffer descriptor queues.

 

 

TX_QUEUE_CNTL0[7–4]

Number of Msgs

0h to Fh

Number of contiguous messages

 

 

 

 

 

(descriptors) to process before moving to

 

 

 

 

 

TX_Queue_Map1.

 

TX_Queue_Map1

TX_QUEUE_CNTL0[11–8]

Queue Pointer

0h to Fh

Pointer to a queue. This pointer can be

 

 

 

 

 

programmed to point to any one of the 16

 

 

 

 

 

TX buffer descriptor queues.

 

 

TX_QUEUE_CNTL0[15–12]

Number of Msgs

0h to Fh

Number of contiguous messages

 

 

 

 

 

(descriptors) to process before moving to

 

 

 

 

 

TX_Queue_Map2.

56

Serial RapidIO (SRIO)

 

 

 

SPRUE13A –September 2006

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Texas Instruments TMS320TCI648x manual TXQUEUECNTL0 Address Offset 7E0h, TXQUEUECNTL1 Address Offset 7E4h, Field Pair