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SRIO Registers
5.91 Port IP Discovery Timer for 4x Mode Register (SP_IP_DISCOVERY_TIMER)
The port IP discovery timer for 4x mode register (SP_IP_DISCOVERY_TIMER) is shown in Figure 154 and described in Table 176.
Figure 154. Port IP Discovery Timer for 4x Mode Register (SP_IP_DISCOVERY_TIMER) - Address
Offset 12000h
31 | 28 | 27 | 24 | 23 | 20 | 19 | 16 |
| DISCOVERY_TIMER |
| Reserved |
| PW_TIMER |
| Reserved |
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15 |
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| 0 |
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| Reserved |
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LEGEND: R/W = Read/Write; R = Read only; |
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Table 176. Port IP Discovery Timer for 4x Mode Register (SP_IP_DISCOVERY_TIMER) Field
Descriptions
Bit | Field | Value | Description |
DISCOVERY_TIMER |
| Discovery timer for 4x mode. The discovery timer allows time for the link partner | |
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| to enter its DISCOVERY state and if the link partner is supporting 4x mode, for |
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| all 4 lanes to be aligned. |
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| 0000b | Reserved |
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| 0001b | 0.84 ms |
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| 0010b | 0.84 ms x 2 = 1.68 ms |
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| ... | ... |
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| 1001b | 0.84 ms x 9= 7.56 ms (default) |
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| ... | ... |
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| 1111b | 0.84 ms x 15= 12.6 ms |
Reserved | 0000b | These | |
PW_TIMER |
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| writing to the error detect registers. |
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| 0000b | Disabled. |
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| 0001b | 107 |
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| 0010b | 214 |
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| 0100b | 428 |
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| 1000b | 856 |
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| Other | Reserved |
Reserved | 0000h | These |
230 | Serial RapidIO (SRIO) | SPRUE13A |