Texas Instruments TMS320TCI648x manual RXUMAPL7, RXUMAPH7, RXUMAPL8, RXUMAPH8, RXUMAPL9, RXUMAPH9

www.ti.com

			SRIO Registers
		Table 40. Serial RapidIO (SRIO) Registers (continued)
Offset	Acronym	Register Description	Section
0838h	RXU_MAP_L7	MailBox-to-Queue Mapping Register L7	Section 5.50
083Ch	RXU_MAP_H7	MailBox-to-Queue Mapping Register H7	Section 5.50
0840h	RXU_MAP_L8	MailBox-to-Queue Mapping Register L8	Section 5.50
0844h	RXU_MAP_H8	MailBox-to-Queue Mapping Register H8	Section 5.50
0848h	RXU_MAP_L9	MailBox-to-Queue Mapping Register L9	Section 5.50
084Ch	RXU_MAP_H9	MailBox-to-Queue Mapping Register H9	Section 5.50
0850h	RXU_MAP_L10	MailBox-to-Queue Mapping Register L10	Section 5.50
0854h	RXU_MAP_H10	MailBox-to-Queue Mapping Register H10	Section 5.50
0858h	RXU_MAP_L11	MailBox-to-Queue Mapping Register L11	Section 5.50
085Ch	RXU_MAP_H11	MailBox-to-Queue Mapping Register H11	Section 5.50
0860h	RXU_MAP_L12	MailBox-to-Queue Mapping Register L12	Section 5.50
0864h	RXU_MAP_H12	MailBox-to-Queue Mapping Register H12	Section 5.50
0868h	RXU_MAP_L13	MailBox-to-Queue Mapping Register L13	Section 5.50
086Ch	RXU_MAP_H13	MailBox-to-Queue Mapping Register H13	Section 5.50
0870h	RXU_MAP_L14	MailBox-to-Queue Mapping Register L14	Section 5.50
0874h	RXU_MAP_H14	MailBox-to-Queue Mapping Register H14	Section 5.50
0878h	RXU_MAP_L15	MailBox-to-Queue Mapping Register L15	Section 5.50
087Ch	RXU_MAP_H15	MailBox-to-Queue Mapping Register H15	Section 5.50
0880h	RXU_MAP_L16	MailBox-to-Queue Mapping Register L16	Section 5.50
0884h	RXU_MAP_H16	MailBox-to-Queue Mapping Register H16	Section 5.50
0888h	RXU_MAP_L17	MailBox-to-Queue Mapping Register L17	Section 5.50
088Ch	RXU_MAP_H17	MailBox-to-Queue Mapping Register H17	Section 5.50
0890h	RXU_MAP_L18	MailBox-to-Queue Mapping Register L18	Section 5.50
0894h	RXU_MAP_H18	MailBox-to-Queue Mapping Register H18	Section 5.50
0898h	RXU_MAP_L19	MailBox-to-Queue Mapping Register L19	Section 5.50
089Ch	RXU_MAP_H19	MailBox-to-Queue Mapping Register H19	Section 5.50
08A0h	RXU_MAP_L20	MailBox-to-Queue Mapping Register L20	Section 5.50
08A4h	RXU_MAP_H20	MailBox-to-Queue Mapping Register H20	Section 5.50
08A8h	RXU_MAP_L21	MailBox-to-Queue Mapping Register L21	Section 5.50
08ACh	RXU_MAP_H21	MailBox-to-Queue Mapping Register H21	Section 5.50
08B0h	RXU_MAP_L22	MailBox-to-Queue Mapping Register L22	Section 5.50
08B4h	RXU_MAP_H22	MailBox-to-Queue Mapping Register H22	Section 5.50
08B8h	RXU_MAP_L23	MailBox-to-Queue Mapping Register L23	Section 5.50
08BCh	RXU_MAP_H23	MailBox-to-Queue Mapping Register H23	Section 5.50
08C0h	RXU_MAP_L24	MailBox-to-Queue Mapping Register L24	Section 5.50
08C4h	RXU_MAP_H24	MailBox-to-Queue Mapping Register H24	Section 5.50
08C8h	RXU_MAP_L25	MailBox-to-Queue Mapping Register L25	Section 5.50
08CCh	RXU_MAP_H25	MailBox-to-Queue Mapping Register H25	Section 5.50
08D0h	RXU_MAP_L26	MailBox-to-Queue Mapping Register L26	Section 5.50
08D4h	RXU_MAP_H26	MailBox-to-Queue Mapping Register H26	Section 5.50
08D8h	RXU_MAP_L27	MailBox-to-Queue Mapping Register L27	Section 5.50
08DCh	RXU_MAP_H27	MailBox-to-Queue Mapping Register H27	Section 5.50
08E0h	RXU_MAP_L28	MailBox-to-Queue Mapping Register L28	Section 5.50
08E4h	RXU_MAP_H28	MailBox-to-Queue Mapping Register H28	Section 5.50
08E8h	RXU_MAP_L29	MailBox-to-Queue Mapping Register L29	Section 5.50
08ECh	RXU_MAP_H29	MailBox-to-Queue Mapping Register H29	Section 5.50
SPRUE13A –September 2006			Serial RapidIO (SRIO)	107
Submit Documentation Feedback