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SRIO Registers
5.38 LSUn Control Register 5 (LSUn_REG5)
There are four of these registers, one for each LSU (see Table 97). LSUn_REG5 is shown in Figure 99 and described in Table 98. For additional programming see Section 2.3.3.
Table 97. LSUn_REG5 Registers and the Associated LSUs
Register | Address Offset | Associated LSU |
LSU1_REG5 | 0414h | LSU1 |
LSU2_REG5 | 0434h | LSU2 |
LSU3_REG5 | 0454h | LSU3 |
LSU4_REG5 | 0474h | LSU4 |
Figure 99. LSUn Control Register 5 (LSUn_REG5)
31 |
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| 16 |
| DRBLL_INFO |
| |
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| ||
15 | 8 | 7 | 0 |
HOP_COUNT |
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| PACKET_TYPE |
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LEGEND: R/W = Read/Write; |
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Table 98. LSUn Control Register 5 (LSUn_REG5) Field Descriptions
Bit | Field | Value | Description |
DRBLL_INFO | RapidIO doorbell info field for type 10 packets. (see Table 23) | ||
HOP_COUNT | RapidIO hop count field specified for type 8 (maintenance) packets | ||
PACKET_TYPE | The 4 MSBs specify the ftype field for all packet types, and the 4 LSBs | ||
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| specify the trans field for packet types 2, 5, and 8. See Section 2.1.2.4 |
160 | Serial RapidIO (SRIO) | SPRUE13A |