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SRIO Functional Description
Segmentation:
The LSU handles two types of segmentation of outbound requests. The first type is when the Byte_Count of Read/Write requests exceeds 256 bytes (up to 4K bytes). The second type is when Read/Write request RapidIO address is
2.3.3.3Direct I/O RX Operation
Response packets are always type 13 RapidIO packets. All response packets with transaction types not equal to 0001b are routed to the LSU block sequentially in order of reception. These packets may have a payload, depending on the type of corresponding request packet that was originally sent. Due to the nature of RapidIO switch fabric systems, response packets can arrive in any order. The data payload, if any, and header data is moved from the RX FIFO to the shared RX buffer. The targetTID field of the packet is examined to determine which core and corresponding set of registers are waiting for the response. Remember, there can be only one outstanding request per core. Any payload data is moved from the shared RX buffer into memory through normal DMA bus operations.
Registers for all
Each outstanding packet response timer requires a
If a response packet indicates ERROR status, the Load/Store module notifies the CPU by generating an error interrupt for the pending
If a Doorbell response packet indicates Retry status, the Load/Store module notifies the CPU by generating an interrupt. The control/command registers can be released as soon as the response packet is received by the logical layer. The hardware is not responsible for attempting retransmission of the Doorbell transaction.
42 | Serial RapidIO (SRIO) | SPRUE13A |