Texas Instruments TMS320TCI648x manual Peripheral Initializations, Set Device ID Registers

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SRIO Functional Description

SRIO_REGS->SERDES_CFG0_CNTL = 0x00000013;

SRIO_REGS->SERDES_CFG1_CNTL = 0x00000000;

SRIO_REGS->SERDES_CFG2_CNTL = 0x00000000;

SRIO_REGS->SERDES_CFG3_CNTL = 0x00000000;

SRIO_REGS->SERDES_CFGRX0_CNTL SRIO_REGS->SERDES_CFGRX1_CNTL SRIO_REGS->SERDES_CFGRX2_CNTL SRIO_REGS->SERDES_CFGRX3_CNTL SRIO_REGS->SERDES_CFGTX0_CNTL SRIO_REGS->SERDES_CFGTX1_CNTL SRIO_REGS->SERDES_CFGTX2_CNTL SRIO_REGS->SERDES_CFGTX3_CNTL

=0x00081121 ; // enable rx, half rate

=0x00081121 ; // enable rx, half rate

=0x00081121 ; // enable rx, half rate

=0x00081121 ; // enable rx, half rate

=0x00010821 ; // enable tx, half rate

=0x00010821 ; // enable tx, half rate

=0x00010821 ; // enable tx, half rate

=0x00010821 ; // enable tx, half rate

2.3.13.3Peripheral Initializations

Set Device ID Registers

rdata = SRIO_REGS->DEVICEID_REG1; wdata = 0x00ABBEEF;

mask = 0x00FFFFFF;

mdata = (wdata & mask) (rdata & ~mask);

SRIO_REGS->DEVICEID_REG1 = mdata ; // id-16b=BEEF, id-08b=AB

rdata = SRIO_REGS->DEVICEID_REG2; wdata = 0x00ABBEEF;

mask = 0x00FFFFFF;

mdata = (wdata & mask) (rdata & ~mask);

SRIO_REGS->DEVICEID_REG2 = mdata ; // id-16b=BEEF, id-08b=AB

rdata = SRIO_REGS->PER_SET_CNTL; data = 0x00000000;

mask = 0x01000000;

mdata = (wdata & mask) (rdata & ~mask);

SRIO_REGS->PER_SET_CNTL = mdata; // bootcmpl=0

SRIO_REGS->DEV_ID		=	0xBEEF0030 ;	//	id=BEEF, ti=0x0030
SRIO_REGS->DEV_INFO		=	0x00000000 ;	//	0
SRIO_REGS->ASBLY_ID		=	0x00000030 ;	//	ti=0x0030
SRIO_REGS->ASBLY_INFO		=	0x00000000;	//	0x0000, next ext=0x0100
SRIO_REGS->PE_FEAT		=	0x20000019 ;	//	proc, bu ext, 16-bit ID, 34-bit addr
SRIO_REGS->SRC_OP		=	0x0000FDF4;	//	all
SRIO_REGS->DEST_OP		=	0x0000FC04;	//	all except atomic
SRIO_REGS->PE_LL_CTL		=	0x00000001;	//	34-bit addr
SRIO_REGS->LCL_CFG_HBAR		=	0x00000000 ;	//	0
SRIO_REGS->LCL_CFG_BAR		=	0x00000000;	//	0
SRIO_REGS->BASE_ID		=	0x00ABBEEF;	//	16b-id=BEEF, 08b-id=AB
SRIO_REGS->HOST_BASE_ID_LOCK =			0x0000BEEF;	//	id=BEEF, lock
SRIO_REGS->COMP_TAG		=	0x00000000;	//	not touched
SRIO_REGS->SP_IP_DISCOVERY_TIMER = 0x90000000;//					0, short cycles for sim
SRIO_REGS->IP_PRESCAL		=	0x00000021;	// srv_clk prescalar=0x21 (333MHz)
SRIO_REGS->SP0_SILENCE_TIMER =			0x20000000;
SRIO_REGS->SP1_SILENCE_TIMER =			0x20000000;
SRIO_REGS->SP2_SILENCE_TIMER =			0x20000000;
SRIO_REGS->SP3_SILENCE_TIMER =			0x20000000;
rdata = SRIO_REGS->PER_SET_CNTL;
wdata	= 0x01000000;
mask	= 0x01000000;

	mdata = (wdata & mask) (rdata & ~mask);
	SRIO_REGS->PER_SET_CNTL =		mdata; // bootcmpl=1
	RIO_REGS->SP_LT_CTL	=	0xFFFFFF00; // long
78	Serial RapidIO (SRIO)		SPRUE13A –September 2006

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