SMSC LAN9312 DATASHEET, TX Data FIFO, Memory Mapped, 9.8.6.2TX Example, TX Data FIFO Port, Data Passed to the, Data Written to the

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

9.8.6.2TX Example 2

In this example, a single 183-Byte Ethernet packet will be transmitted. This packet is in a single buffer as follows:

„2-Byte “Data Start Offset”

„183-Bytes of payload data

„4-Byte “Buffer End Alignment”

Figure 9.6 illustrates the TX command structure for this example, and also shows how data is passed to the TX Data FIFO. Note that the packet resides in a single TX Buffer, therefore both the FS and LS bits are set in TX command ‘A’.

	Data Written to the	Data Passed to the
	Memory Mapped
	TX Data FIFO Port	TX Data FIFO
TX Command 'A'	31	0
	TX Command 'A'	TX Command 'A'
Buffer End Alignment = 0
Data Start Offset = 6	TX Command 'B'	TX Command 'B'
First Segment = 1
Last Segment = 1	6-Byte Data Start Offset
Buffer Size =183
TX Command 'B'
Packet Length = 183

183-Byte Payload Data 183-Byte Payload Data

3B End Padding

NOTE: Extra bytes between buffers are not transmitted

Figure 9.6 TX Example 2

Revision 1.4 (08-19-08)	130	SMSC LAN9312
	DATASHEET