High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.2.2.4RX FIFO Information Register (RX_FIFO_INF)

Offset:

07Ch

Size:

32 bits

This register contains the indication of used space in the RX FIFO’s.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:24

RESERVED

RO

-

 

 

 

 

23:16

RX Status FIFO Used Space (RXSUSED)

RO

0b

 

This field indicates the amount of space, in DWORD’s, currently used in the

 

 

 

RX Status FIFO.

 

 

 

 

 

 

15:0

RX Data FIFO Used Space (RXDUSED)

RO

0b

 

This field indicates the amount of space, in bytes, used in the RX Data FIFO.

 

 

 

For each receive frame, the field is incremented by the length of the receive

 

 

 

data. In cases where the payload does not end on a DWORD boundary, the

 

 

 

total will be rounded up to the nearest DWORD.

 

 

 

 

 

 

Revision 1.4 (08-19-08)

184

SMSC LAN9312

 

DATASHEET