High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.2.6.3Port 0(Host MAC) Manual Flow Control Register (MANUAL_FC_MII)

Offset:

1A8h

Size:

32 bits

This read/write register allows for the manual configuration of the switch Port 0(Host MAC) flow control. This register also provides read back of the currently enabled flow control settings, whether set manually or Auto-Negotiated. Refer to Section 6.2.3, "Flow Control Enable Logic," on page 58 for additional information.

Note: The flow control values in the Section 14.2.8.5, "Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)," on page 252 are not affected by the values of this register.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:8

RESERVED

RO

-

 

 

 

 

7

Port 0 Hard-wired Flow Control (HW_FC_MII)

R/W

0b

 

When set to “1”, the Host MACs RX FIFO level is connected to the switch

 

 

 

engine’s transmitter and the switch engines RX FIFO level is connected to

 

 

 

the Host MACs transmitter. This achieves lower latency flow control.

 

 

 

Note: All other flow control methods must be disabled when using this

 

 

 

feature. (MANUAL_FC_MII should be set, TX_FC_MII,

 

 

 

RX_FC_MII, and BP_EN_MII should be cleared. FCANY, FCADD,

 

 

 

FCBRD, and FCMULT in the AFC_CFG register should be

 

 

 

cleared).

 

 

 

 

 

 

6

Port 0 Backpressure Enable (BP_EN_MII)

R/W

Note 14.12

 

This bit enables/disables the generation of half-duplex backpressure on

 

 

 

switch Port 0.

 

 

 

0: Disable backpressure

 

 

 

1: Enable backpressure

 

 

 

 

 

 

5

Port 0 Current Duplex (CUR_DUP_MII)

RO

Note 14.13

 

This bit indicates the actual duplex setting of the switch Port 0.

 

 

 

0: Full-Duplex

 

 

 

1: Half-Duplex

 

 

 

 

 

 

4

Port 0 Current Receive Flow Control Enable (CUR_RX_FC_MII)

RO

Note 14.13

 

This bit indicates the actual receive flow setting of switch Port 0

 

 

 

0: Flow control receive is currently disabled

 

 

 

1: Flow control receive is currently enabled

 

 

 

 

 

 

3

Port 0 Current Transmit Flow Control Enable (CUR_TX_FC_MII)

RO

Note 14.13

 

This bit indicates the actual transmit flow setting of switch Port 0.

 

 

 

0: Flow control transmit is currently disabled

 

 

 

1: Flow control transmit is currently enabled

 

 

 

 

 

 

2

Port 0 Receive Flow Control Enable (RX_FC_MII)

R/W

Note 14.14

 

When the MANUAL_FC_MII bit is set, or Virtual Auto-Negotiation is

 

 

 

disabled, this bit enables/disables the detection of full-duplex Pause packets

 

 

 

on switch Port 0.

 

 

 

0: Disable flow control receive

 

 

 

1: Enable flow control receive

 

 

 

 

 

 

SMSC LAN9312

233

Revision 1.4 (08-19-08)

 

DATASHEET