High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.5.3.23Switch Engine Broadcast Throttling Register (SWE_BCST_THROT)

Register #:

1848h

Size:

32 bits

This register configures the broadcast input rate throttling.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:27

RESERVED

RO

-

 

 

 

 

26

Broadcast Throttle Enable Port 2

R/W

0b

 

This bit enables broadcast input rate throttling on Port 2.

 

 

 

 

 

 

25:18

Broadcast Throttle Level Port 2

R/W

02h

 

These bits specify the number of bytes x 64 allowed to be received per

 

 

 

every 1.72mS interval.

 

 

 

 

 

 

17

Broadcast Throttle Enable Port 1

R/W

0b

 

This bit enables broadcast input rate throttling on Port 1.

 

 

 

 

 

 

16:9

Broadcast Throttle Level Port 1

R/W

02h

 

These bits specify the number of bytes x 64 allowed to be received per

 

 

 

every 1.72mS interval.

 

 

 

 

 

 

8

Broadcast Throttle Enable Port 0

R/W

0b

 

This bit enables broadcast input rate throttling on Port 0(Host MAC).

 

 

 

 

 

 

7:0

Broadcast Throttle Level Port 0

R/W

02h

 

These bits specify the number of bytes x 64 allowed to be received per

 

 

 

every 1.72mS interval.

 

 

 

 

 

 

SMSC LAN9312

391

Revision 1.4 (08-19-08)

 

DATASHEET