High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.3.1Host MAC Control Register (HMAC_CR)
Offset: | 1h | Size: | 32 bits |
This read/write register establishes the RX and TX operation modes and controls for address filtering and packet filtering. Refer to Chapter 9, "Host MAC," on page 112 for additional information.
Bits
BITS | DESCRIPTION | TYPE | DEFAULT |
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31 | Receive All Mode (RXALL) | R/W | 0b |
| When set, all incoming packets will be received and passed on to the |
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| address filtering function for processing of the selected filtering mode on the |
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| received frame. Address filtering then occurs and is reported in Receive |
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| Status. When cleared, only frames that pass Destination Address filtering |
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| will be sent to the application. |
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30:24 | RESERVED | RO | - |
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23 | Disable Receive Own (RCVOWN) | R/W | 0b |
| When set, the Host MAC disables the reception of frames when TXEN (bit |
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| 3) is asserted. The Host MAC blocks the transmitted frame on the receive |
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| path. When cleared, the Host MAC receives all packets, including those |
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| transmitted by the Host MAC. This bit should be cleared when the Full |
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| Duplex Mode bit is set. |
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22 | RESERVED | RO | - |
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21 | Loopback operation Mode (LOOPBK) | R/W | 0b |
| Selects the loop back operation modes for the Host MAC. This field is only |
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| valid for full duplex mode. In internal loopback mode, the TX frame is |
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| received by the internal MII interface, and sent back to the Host MAC |
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| without being sent to the switch fabric. |
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| 0: Normal Operation. Loopback disabled. |
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| 1: Loopback enabled |
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| Note: When enabling or disabling the loopback mode it can take up to |
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| 10μs for the mode change to occur. The transmitter and receiver |
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| must be stopped and disabled when modifying the LOOPBK bit. |
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| The transmitter or receiver should not be enabled within10μs of |
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| modifying the LOOPBK bit. |
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20 | Full Duplex Mode (FDPX) | R/W | 0b |
| When set, the Host MAC operates in |
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| transmit and receive simultaneously. |
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19 | Pass All Multicast (MCPAS) | R/W | 0b |
| When set, indicates that all incoming frames with a Multicast destination |
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| address (first bit in the destination address field is 1) are received. Incoming |
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| frames with physical address (Individual Address/Unicast) destinations are |
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| filtered and received only if the address matches the Host MAC Address. |
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18 | Promiscuous Mode (PRMS) | R/W | 1b |
| When set, indicates that any incoming frame is received regardless of its |
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| destination address. |
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17 | Inverse filtering (INVFILT) | R/W | 0b |
| When set, the address check function operates in inverse filtering mode. |
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| This is valid only during Perfect filtering mode. Refer to Section 9.4.4, |
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| "Inverse Filtering," on page 116 for additional information. |
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Revision 1.4 | 270 | SMSC LAN9312 |
| DATASHEET |
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