High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.4Ethernet PHY Control and Status Registers
This section details the various LAN9312 Ethernet PHY control and status registers. The LAN9312 contains three PHY’s: Port 1 PHY, Port 2 PHY and a Virtual PHY. All PHY registers follow the IEEE
802.3(clause 22.2.4) specified MII management register set. All functionality and bit definitions comply with these standards. The IEEE 802.3 specified register index (in decimal) is included with each register definition, allowing for addressing of these registers via the MII serial management protocol. For additional information on the MII management protocol, refer to the IEEE 802.3 Specification.
Each individual PHY is assigned a unique PHY address as detailed in Section 7.1.1, "PHY Addressing," on page 82.
14.4.1Virtual PHY Registers
The Virtual PHY provides a basic MII management interface for communication with the Host MAC for connection to the Host as if it was attached to a single port PHY. The Virtual PHY registers differ from the Port 1 & 2 PHY registers in that they are addressable via the memory map, as described in Table 14.1, as well as serially. These modes of access are described in Section 14.2.8, "Virtual PHY," on page 245.
Because the Virtual PHY registers are also memory mapped, their definitions have been included in the System Control and Status Registers Section 14.2.8, "Virtual PHY," on page 245. A list of the Virtual PHY MII addressable registers and their corresponding register index numbers is also included in Table 14.4.
Note: When serially accessed, the Virtual PHY registers are only
14.4.2Port 1 & 2 PHY Registers
The Port 1 and Port 2 PHY’s are comparable in functionality and have an identical set of
Table 14.7 Port 1 & 2 PHY MII Serially Adressable Registers
INDEX # | SYMBOL | REGISTER NAME |
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0 | PHY_BASIC_CONTROL_x | Port x PHY Basic Control Register, Section 14.4.2.1 |
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1 | PHY_BASIC_STATUS_x | Port x PHY Basic Status Register, Section 14.4.2.2 |
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2 | PHY_ID_MSB_x | Port x PHY Identification MSB Register, Section 14.4.2.3 |
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3 | PHY_ID_LSB_x | Port x PHY Identification LSB Register, Section 14.4.2.4 |
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4 | PHY_AN_ADV_x | Port x PHY |
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5 | PHY_AN_LP_BASE_ABILITY_x | Port x PHY |
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| Register, Section 14.4.2.6 |
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6 | PHY_AN_EXP_x | Port x PHY |
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SMSC LAN9312 | 285 | Revision 1.4 |
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