High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.5.4.9Buffer Manager Reset Status Register (BM_RST_STS)

Register #:

1C08h

Size:

32 bits

This register indicates when the Buffer Manager has been initialized by the reset process.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:1

RESERVED

RO

-

 

 

 

 

0

BM Ready

RO

Note 14.63

 

When set, indicates the Buffer Manager tables have finished being initialized

SS

 

 

by the reset process. The initialization is performed upon any reset that

 

 

 

resets the switch fabric.

 

 

 

 

 

 

Note 14.63 The default value of this bit is 0 immediately following any switch fabric reset and then self- sets to 1 once the ALR table is initialized.

SMSC LAN9312

419

Revision 1.4 (08-19-08)

 

DATASHEET