SMSC LAN9312 10.2.2.5I2C EEPROM Byte Writes

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Sequential reads are used by the EEPROM Loader. Refer to Section 10.2.4, "EEPROM Loader" for additional information.

For a register level description of a read operation, refer to Section 10.2.1, "EEPROM Controller Operation," on page 138.

10.2.2.5I2C EEPROM Byte Writes

Following the device addressing, a data byte may be written to the EEPROM by outputting the data

after receiving the acknowledge from the EEPROM. The data byte is acknowledged by the EEPROM slave and the I2C master finishes the write cycle with a stop condition. If the EEPROM slave fails to send an acknowledge, then the sequence is aborted and the EPC_TIMEOUT bit in the EEPROM Command Register (E2P_CMD) is set.

Following the data byte write cycle, the I2C master will poll the EEPROM to determine when the byte write is finished. A start condition is sent followed by a control byte with a control code of 1010b,

chip/block select bits low, and the R/~W bit low. If the EEPROM is finished with the byte write, it will respond with an acknowledge. Otherwise, it will respond with a no-acknowledge and the I2C master will repeat the poll. If the acknowledge does not occur within 30mS, a time-out occurs. Once the I2C master receives the acknowledge, it concludes by sending a start condition, followed by a stop condition, which will place the EEPROM into standby.

Figure 10.4 illustrates typical I2C EEPROM byte write.

				Data Cycle											Poll Cycle											Poll Cycle												Poll Cycle					Conclude
			Data Byte											Control Byte											Control Byte								...				Control Byte
C	7	6	5	4	3	2	1	0	C	P	S	1	0		1	0	0	0	0	0	C	S	1	0		1	0	0	0	0	0	C		S	1	0		1	0	0	0	0	0	C	S	P
A	D	D	D	D	D	D	D	D	A																																			A
																					A											A
K									K												K											K												K
															Chip / Block					R/~W						Chip / Block					R/~W							Chip / Block					R/~W
															Select Bits											Select Bits												Select Bits

Figure 10.6 I2C EEPROM Byte Write

For a register level description of a write operation, refer to Section 10.2.1, "EEPROM Controller Operation," on page 138.

SMSC LAN9312	143	Revision 1.4 (08-19-08)
	DATASHEET