High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
Table 14.1 System Control and Status Registers (continued)
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OFFSET | SYMBOL | REGISTER NAME |
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1A0h | MANUAL_FC_1 | Port 1 Manual Flow Control Register, Section 14.2.6.1 |
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1A4h | MANUAL_FC_2 | Port 2 Manual Flow Control Register, Section 14.2.6.2 |
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1A8h | MANUAL_FC_MII | Port 0 Flow Control Register, Section 14.2.6.3 |
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1ACh | SWITCH_CSR_DATA | Switch Fabric CSR Interface Data Register, |
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1B0h | SWITCH_CSR_CMD | Switch Fabric CSR Interface Command Register, |
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1B4h | E2P_CMD | EEPROM Command Register, Section 14.2.4.1 |
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1B8h | E2P_DATA | EEPROM Data Register, Section 14.2.4.2 |
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1BCh | LED_CFG | LED Configuration Register, Section 14.2.3.4 |
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1C0h | VPHY_BASIC_CTRL | Virtual PHY Basic Control Register, Section 14.2.8.1 |
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1C4h | VPHY_BASIC_STATUS | Virtual PHY Basic Status Register, Section 14.2.8.2 |
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1C8h | VPHY_ID_MSB | Virtual PHY Identification MSB Register, Section 14.2.8.3 |
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1CCh | VPHY_ID_LSB | Virtual PHY Identification LSB Register, Section 14.2.8.4 |
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1D0h | VPHY_AN_ADV | Virtual PHY |
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1D4h | VPHY_AN_LP_BASE_ABILITY | Virtual PHY |
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| Ability Register, Section 14.2.8.6 |
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1D8h | VPHY_AN_EXP | Virtual PHY |
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1DCh | VPHY_SPECIAL_CONTROL_STATUS | Virtual PHY Special Control/Status Register, |
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1E0h | GPIO_CFG | General Purpose I/O Configuration Register, |
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1E4h | GPIO_DATA_DIR | General Purpose I/O Data & Direction Register, |
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1E8h | GPIO_INT_STS_EN | General Purpose I/O Interrupt Status and Enable Register, |
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1ECh | RESERVED | Reserved for Future Use |
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1F0h | SWITCH_MAC_ADDRH | Switch MAC Address High Register, Section 14.2.6.6 |
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1F4h | SWITCH_MAC_ADDRL | Switch MAC Address Low Register, Section 14.2.6.7 |
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1F8h | RESET_CTL | Reset Control Register, Section 14.2.9.8 |
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1FCh | RESERVED | Reserved for Future Use |
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SWITCH_CSR_DIRECT_DATA | Switch Engine CSR Interface Direct Data Register, | |
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RESERVED | Reserved for Future Use | |
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SMSC LAN9312 | 171 | Revision 1.4 |
| DATASHEET |
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