High Performance Two Port 10/100 Managed Ethernet Switch with
Datasheet
14.2.9Miscellaneous
This section details the remainder of the System CSR’s. These registers allow for monitoring and configuration of various LAN9312 functions such as the Chip ID/revision, byte order testing, power management, hardware configuration, general purpose timer, and free running counter.
14.2.9.1Chip ID and Revision (ID_REV)
Offset: | 050h | Size: | 32 bits |
This
BITS | DESCRIPTION | TYPE | DEFAULT |
|
|
|
|
31:16 | Chip ID | RO | 9312h |
| This field indicates the chip ID. |
|
|
|
|
|
|
15:0 | Chip Revision | RO | |
| This field indicates the design revision. |
|
|
|
|
|
|
| Note 14.46 Default value is dependent on device revision. |
|
|
SMSC LAN9312 | 259 | Revision 1.4 |
| DATASHEET |
|