High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.5.2.19Port x MAC Receive Packet Length Count Register (MAC_RX_PKTLEN_CNT_x)

Register #:

Port0: 0420h

Size:

32 bits

 

Port1:

0820h

 

 

 

Port2:

0C20h

 

 

This register provides a counter of total bytes received. The counter is cleared upon being read.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:0

RX Bytes

RC

00000000h

 

Count of total bytes received (including bad packets).

 

 

 

Note: This counter will stop at its maximum value of FFFF_FFFFh.

 

 

 

Minimum rollover time at 100Mbps is approximately 5.8 hours.

 

 

 

 

 

 

Note: If necessary, for oversized packets, the packet is either truncated at 1518 bytes (untagged, Jumbo2K=0), 1522 bytes (tagged, Jumbo2K=0), or 2048 bytes (Jumbo2K=1). If this occurs, the byte count recorded is 1518, 1522, or 2048, respectively. The Jumbo2K bit is located in the Port x MAC Receive Configuration Register (MAC_RX_CFG_x).

Note: A bad packet is one that has an FCS or Symbol error. For this counter, a packet that is not an integral number of bytes (e.g. a 1518 1/2 byte packet) is rounded down to the nearest byte.

Revision 1.4 (08-19-08)

340

SMSC LAN9312

 

DATASHEET