High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.3.5Host MAC Multicast Hash Table Low Register (HMAC_HASHL)

Offset:

5h

Size:

32 bits

This read/write register defines the lower 32-bits of the Multicast Hash Table. Please refer to the Host MAC Multicast Hash Table High Register (HMAC_HASHH) and Section 9.4, "Address Filtering" for more information.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:0

Lower 32-bits of the 64-bit Hash Table

R/W

00000000h

 

 

 

 

Revision 1.4 (08-19-08)

276

SMSC LAN9312

 

DATASHEET