High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

14.5.2.42Port x MAC Transmit Total Collision Count Register (MAC_TX_TOTALCOL_CNT_x)

Register #:

Port0: 0463h

Size:

32 bits

 

Port1:

0863h

 

 

 

Port2:

0C63h

 

 

This register provides a counter of total collisions including late collisions. The counter is cleared upon being read.

BITS

DESCRIPTION

TYPE

DEFAULT

 

 

 

 

31:0

TX Total Collision

RC

00000000h

 

Total count of collisions including late collisions. This counter is incremented

 

 

 

only in half-duplex operation.

 

 

 

Note: This counter will stop at its maximum value of FFFF_FFFFh.

 

 

 

Minimum rollover time at 100Mbps is approximately 92 hours.

 

 

 

 

 

 

SMSC LAN9312

363

Revision 1.4 (08-19-08)

 

DATASHEET